sb/amd/sr5650: Use 32 bit integers when disabling ports
This function attempts to set bits in the 20s of state and state_save, which won't work since those variables are only 16 bits wide. Extend them to 32 bits to capture all the bit operations. Change-Id: I5616a2d879a85ff5f57af5af20384516659c62d6 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1347384 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
committed by
Patrick Georgi
parent
493d36684c
commit
f69c96dd8d
@ -59,11 +59,11 @@ static void PciePowerOffGppPorts(struct device *nb_dev, struct device *dev, u32
|
|||||||
{
|
{
|
||||||
printk(BIOS_DEBUG, "PciePowerOffGppPorts() port %d\n", port);
|
printk(BIOS_DEBUG, "PciePowerOffGppPorts() port %d\n", port);
|
||||||
u32 reg;
|
u32 reg;
|
||||||
u16 state_save;
|
u32 state_save;
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
struct southbridge_amd_sr5650_config *cfg =
|
struct southbridge_amd_sr5650_config *cfg =
|
||||||
(struct southbridge_amd_sr5650_config *)nb_dev->chip_info;
|
(struct southbridge_amd_sr5650_config *)nb_dev->chip_info;
|
||||||
u16 state = cfg->port_enable;
|
u32 state = cfg->port_enable;
|
||||||
|
|
||||||
if (!(AtiPcieCfg.Config & PCIE_DISABLE_HIDE_UNUSED_PORTS))
|
if (!(AtiPcieCfg.Config & PCIE_DISABLE_HIDE_UNUSED_PORTS))
|
||||||
state &= AtiPcieCfg.PortDetect;
|
state &= AtiPcieCfg.PortDetect;
|
||||||
|
Reference in New Issue
Block a user