sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

There are more than a dozen targets in the v2 tree which refer to ROMCC

Browse Source 
in their Config.lb but never use it. There's no point in keeping
dead code around.

This patch removes ROMCC remainders from Config.lb and kills orphaned
auto.c and failover.c in the affected mainboard directories.

arima/hdama
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms9282
newisys/khepri
sunw/ultra40
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882

Abuild log is completely identical with and without the patch.

With this patch, the last ROMCC remainders for K8 boards are gone.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
2009-04-03 16:29:35 +00:00
parent f16fb73087
commit f7116c3bd0
30 changed files with 0 additions and 2862 deletions
Download Patch File Download Diff File Expand all files Collapse all files

56
src/mainboard/iwill/dk8s2/Config.lb
View File

@@ -50,8 +50,6 @@ if HAVE_PIRQ_TABLE object irq_tables.o end
## ATI Rage XL framebuffering graphics driver
dir /drivers/ati/ragexl
if USE_DCACHE_RAM
if CONFIG_USE_INIT
makerule ./auto.o
@@ -68,30 +66,6 @@ makerule ./auto.inc
action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
end
end
else
##
## Romcc output
##
makerule ./failover.E
depends "$(MAINBOARD)/failover.c ../romcc"
action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
end
makerule ./failover.inc
depends "$(MAINBOARD)/failover.c ../romcc"
action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
end
makerule ./auto.E
depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
action "../romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
makerule ./auto.inc
depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
action "../romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
end
##
@@ -104,7 +78,6 @@ end
mainboardinit cpu/x86/32bit/entry32.inc
if USE_DCACHE_RAM
if CONFIG_USE_INIT
ldscript /cpu/x86/32bit/entry32.lds
end
@@ -112,7 +85,6 @@ if USE_DCACHE_RAM
if CONFIG_USE_INIT
ldscript /cpu/amd/car/cache_as_ram.lds
end
end
##
## Build our reset vector (This is where coreboot is entered)
@@ -125,24 +97,16 @@ else
ldscript /cpu/x86/32bit/reset32.lds
end
if USE_DCACHE_RAM
else
### Should this be in the northbridge code?
mainboardinit arch/i386/lib/cpu_reset.inc
end
##
## Include an id string (For safe flashing)
##
mainboardinit arch/i386/lib/id.inc
ldscript /arch/i386/lib/id.lds
if USE_DCACHE_RAM
##
## Setup Cache-As-Ram
##
mainboardinit cpu/amd/car/cache_as_ram.inc
end
###
### This is the early phase of coreboot startup
@@ -150,12 +114,7 @@ end
### failover to another image.
###
if USE_FALLBACK_IMAGE
if USE_DCACHE_RAM
ldscript /arch/i386/lib/failover.lds
else
ldscript /arch/i386/lib/failover.lds
mainboardinit ./failover.inc
end
end
###
@@ -165,27 +124,12 @@ end
##
## Setup RAM
##
if USE_DCACHE_RAM
if CONFIG_USE_INIT
initobject auto.o
else
mainboardinit ./auto.inc
end
else
##
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
mainboardinit cpu/x86/mmx/enable_mmx.inc
mainboardinit cpu/x86/sse/enable_sse.inc
mainboardinit ./auto.inc
mainboardinit cpu/x86/sse/disable_sse.inc
mainboardinit cpu/x86/mmx/disable_mmx.inc
end
##
## Include the secondary Configuration files
##