x86: provide symmetry between arm for cache_sync_instructions()
The arm architecture currently exports cache_sync_instructions() in <arch/cache.h>. In order for rmodule loading to work on arm architectures the cache_sync_instructions() needs to be called to sequence the instruction cache. To avoid sprinkling #ifdefs around just add an empty cache_sync_instructions() definition. BUG=chrome-os-partner:27094 BRANCH=None TEST=Built and booted nyan and rambi. Original-Change-Id: I1a969757fffe0ca92754a0d953ba3630810556e3 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/191551 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit fda20947b928ee761d5ed15e414636af419970a6) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I3e8ca12e1d82ccedf1ff9851ae3c5c80cda2dd5f Reviewed-on: http://review.coreboot.org/7710 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -20,6 +20,7 @@
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <arch/cache.h>
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#include <console/console.h>
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#include <rmodule.h>
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@ -196,6 +197,9 @@ int rmodule_load(void *base, struct rmodule *module)
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if (rmodule_relocate(module))
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return -1;
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rmodule_clear_bss(module);
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cache_sync_instructions();
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return 0;
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}
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