soc/intel/broadwell: Rework acpi/cpu.asl

Use acpigen_write_processor_cnot to implement notifications to the CPU.
Automatically generate \PPKG in SSDT.

Change-Id: I79d2eed9b89b420554ce10d1fc0f151b1872afe2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29890
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

src/mainboard/google/auron/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 #include <variant/thermal.h>
 
 // Thermal Zone

src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 #include "../thermal.h"
 
 // Thermal Zone

src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 #include "../thermal.h"
 
 // Thermal Zone

src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 #include "../thermal.h"
 
 // Thermal Zone

src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 #include "../thermal.h"
 
 // Thermal Zone

src/mainboard/intel/wtm2/acpi/thermal.asl

@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+/* Generated by acpigen */
+External (\PPKG, MethodObj)
+
 // Thermal Zone
 #include "../thermal.h"
 

src/soc/intel/broadwell/acpi.c

@@ -570,6 +570,13 @@ void generate_cpu_entries(struct device *device)
 			acpigen_pop_len();
 		}
 	}
+
+	/* PPKG is usually used for thermal management
+	   of the first and only package. */
+	acpigen_write_processor_package("PPKG", 0, cores_per_package);
+
+	/* Add a method to notify processor nodes */
+	acpigen_write_processor_cnot(cores_per_package);
 }
 
 static unsigned long acpi_fill_dmar(unsigned long current)

src/soc/intel/broadwell/acpi/cpu.asl

@@ -13,106 +13,23 @@
  * GNU General Public License for more details.
  */
 
-/* These devices are created at runtime */
-External (\_PR.CP00, DeviceObj)
-External (\_PR.CP01, DeviceObj)
-External (\_PR.CP02, DeviceObj)
-External (\_PR.CP03, DeviceObj)
-External (\_PR.CP04, DeviceObj)
-External (\_PR.CP05, DeviceObj)
-External (\_PR.CP06, DeviceObj)
-External (\_PR.CP07, DeviceObj)
+/* These come from the dynamically created CPU SSDT */
+External (\_PR.CNOT, MethodObj)
 
-/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
+/* Notify OS to re-read CPU tables */
 Method (PNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x81)  // _CST
-		Notify (\_PR.CP01, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x81)  // _CST
-		Notify (\_PR.CP03, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CP04, 0x81)  // _CST
-		Notify (\_PR.CP05, 0x81)  // _CST
-		Notify (\_PR.CP06, 0x81)  // _CST
-		Notify (\_PR.CP07, 0x81)  // _CST
-	}
+	\_PR.CNOT (0x81)
 }
 
-/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
+/* Notify OS to re-read CPU _PPC limit */
 Method (PPCN)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x80)  // _PPC
-		Notify (\_PR.CP01, 0x80)  // _PPC
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x80)  // _PPC
-		Notify (\_PR.CP03, 0x80)  // _PPC
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CP04, 0x80)  // _PPC
-		Notify (\_PR.CP05, 0x80)  // _PPC
-		Notify (\_PR.CP06, 0x80)  // _PPC
-		Notify (\_PR.CP07, 0x80)  // _PPC
-	}
+	\_PR.CNOT (0x80)
 }
 
-/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
+/* Notify OS to re-read Throttle Limit tables */
 Method (TNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x82)  // _TPC
-		Notify (\_PR.CP01, 0x82)  // _TPC
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x82)  // _TPC
-		Notify (\_PR.CP03, 0x82)  // _TPC
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CP04, 0x82)  // _TPC
-		Notify (\_PR.CP05, 0x82)  // _TPC
-		Notify (\_PR.CP06, 0x82)  // _TPC
-		Notify (\_PR.CP07, 0x82)  // _TPC
-	}
-}
-
-/* Return a package containing enabled processor entries */
-Method (PPKG)
-{
-	If (LGreaterEqual (\PCNT, 8)) {
-		Return (Package()
-		{
-			\_PR.CP00,
-			\_PR.CP01,
-			\_PR.CP02,
-			\_PR.CP03,
-			\_PR.CP04,
-			\_PR.CP05,
-			\_PR.CP06,
-			\_PR.CP07
-		})
-	} ElseIf (LGreaterEqual (\PCNT, 4)) {
-		Return (Package ()
-		{
-			\_PR.CP00,
-			\_PR.CP01,
-			\_PR.CP02,
-			\_PR.CP03
-		})
-	} ElseIf (LGreaterEqual (\PCNT, 2)) {
-		Return (Package ()
-		{
-			\_PR.CP00,
-			\_PR.CP01
-		})
-	} Else {
-		Return (Package ()
-		{
-			\_PR.CP00
-		})
-	}
+	\_PR.CNOT (0x82)
 }