sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/aoac: fix typo in FCH_AOAC_REF_CLK_OK_STATE definition

Browse Source 
The bit is called REF_CLK_OK_STATE and not RST_CLK_OK_STATE, so change
the name of the define to FCH_AOAC_REF_CLK_OK_STATE.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iae26db94d83ebb2cb799f6d3e0bec37c8e849219
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held
2021-11-24 10:54:20 +01:00
parent 23d03e912a
commit f80f32b0e5
2 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/common/block/aoac/aoac.c
View File

@@ -24,8 +24,8 @@ void power_off_aoac_device(unsigned int dev)
bool is_aoac_device_enabled(unsigned int dev)
{
uint8_t byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE);
if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE))
return true;
else
return false;

2
src/soc/amd/common/block/include/amdblocks/aoac.h
View File

@@ -24,7 +24,7 @@
/* Bit definitions for Device D3 State AOACx0000[41...7f; odd byte addresses] */
#define FCH_AOAC_PWR_RST_STATE BIT(0)
#define FCH_AOAC_RST_CLK_OK_STATE BIT(1)
#define FCH_AOAC_REF_CLK_OK_STATE BIT(1)
#define FCH_AOAC_RST_B_STATE BIT(2)
#define FCH_AOAC_DEV_OFF_GATING_STATE BIT(3)
#define FCH_AOAC_D3COLD BIT(4)