- To reduce confuse rename the parts of linuxbios bios that run from

ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
2004-10-30 08:05:41 +00:00
parent 0afcba7a3d
commit f8a2dddb57
40 changed files with 1451 additions and 400 deletions

View File

@@ -2,7 +2,6 @@
#define DELAY_H
#ifndef __ROMCC__
void init_timer(void);
void udelay(unsigned usecs);
void mdelay(unsigned msecs);
void delay(unsigned secs);

View File

@@ -13,7 +13,6 @@ struct smbus_bus_operations;
/* Chip operations */
struct chip_operations {
char *name; /* This is the print name for debugging */
void (*enable_dev)(struct device *dev);
};

View File

@@ -290,8 +290,15 @@
#define PCI_DEVICE_ID_NS_87560_USB 0x0012
#define PCI_DEVICE_ID_NS_83815 0x0020
#define PCI_DEVICE_ID_NS_83820 0x0022
#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500
#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501
#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502
#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503
#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504
#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505
#define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_VENDOR_ID_TSENG 0x100c
#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
#define PCI_DEVICE_ID_TSENG_W32P_b 0x3205
@@ -990,6 +997,7 @@
#define PCI_DEVICE_ID_VIA_82C693_1 0x0698
#define PCI_DEVICE_ID_VIA_82C926 0x0926
#define PCI_DEVICE_ID_VIA_82C576_1 0x1571
#define PCI_DEVICE_ID_VIA_82C416 0x1571
#define PCI_DEVICE_ID_VIA_82C595_97 0x1595
#define PCI_DEVICE_ID_VIA_82C586_2 0x3038
#define PCI_DEVICE_ID_VIA_82C586_3 0x3040
@@ -1795,7 +1803,32 @@
#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4
#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
#define PCI_DEVICE_ID_INTEL_82801DBM_1E0 0x2448
#define PCI_DEVICE_ID_INTEL_82801DBM_1F0 0x24cc
#define PCI_DEVICE_ID_INTEL_82801DBM_1F1 0x24ca
#define PCI_DEVICE_ID_INTEL_82801DBM_1F3 0x24c3
#define PCI_DEVICE_ID_INTEL_82801DBM_1F5 0x24c5
#define PCI_DEVICE_ID_INTEL_82801DBM_1F6 0x24c6
#define PCI_DEVICE_ID_INTEL_82801DBM_1D0 0x24c2
#define PCI_DEVICE_ID_INTEL_82801DBM_1D1 0x24c4
#define PCI_DEVICE_ID_INTEL_82801DBM_1D2 0x24c7
#define PCI_DEVICE_ID_INTEL_82801DBM_1D7 0x24cd
#define PCI_DEVICE_ID_INTEL_82801ER_1E0 0x244e
#define PCI_DEVICE_ID_INTEL_82801ER_1F0 0x24d0
#define PCI_DEVICE_ID_INTEL_82801ER_1F1 0x24db
#define PCI_DEVICE_ID_INTEL_82801ER_1F2 0x24d1
#define PCI_DEVICE_ID_INTEL_82801ER_1F2_R 0x24df
#define PCI_DEVICE_ID_INTEL_82801ER_1F3 0x24d3
#define PCI_DEVICE_ID_INTEL_82801ER_1F5 0x24d5
#define PCI_DEVICE_ID_INTEL_82801ER_1F6 0x24d6
#define PCI_DEVICE_ID_INTEL_82801ER_1D0 0x24d2
#define PCI_DEVICE_ID_INTEL_82801ER_1D1 0x24d4
#define PCI_DEVICE_ID_INTEL_82801ER_1D2 0x24d7
#define PCI_DEVICE_ID_INTEL_82801ER_1D3 0x24de
#define PCI_DEVICE_ID_INTEL_82801ER_1D7 0x24dd
#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
@@ -1888,53 +1921,4 @@
#define PCI_DEVICE_ID_AMD_761_1 0x700F
#define PCI_DEVICE_ID_AMD_VIPER_7412 0x7412
#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500
#define PCI_DEVICE_ID_NS_83815 0x0020
#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501
#define PCI_DEVICE_ID_NS_83820 0x0022
#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502
#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503
#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504
#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505
#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
#define PCI_DEVICE_ID_INTEL_82801CA_1E0 0x244e
#define PCI_DEVICE_ID_INTEL_82801CA_1F0 0x2480
#define PCI_DEVICE_ID_INTEL_82801CA_1F1 0x248b
#define PCI_DEVICE_ID_INTEL_82801CA_1D0 0x2482
#define PCI_DEVICE_ID_INTEL_82801CA_1F3 0x2483
#define PCI_DEVICE_ID_INTEL_82801CA_1D1 0x2484
#define PCI_DEVICE_ID_INTEL_82801CA_1F5 0x2485
#define PCI_DEVICE_ID_INTEL_82801CA_1D2 0x2487
#define PCI_DEVICE_ID_INTEL_82801DBM_1E0 0x2448
#define PCI_DEVICE_ID_INTEL_82801DBM_1F0 0x24cc
#define PCI_DEVICE_ID_INTEL_82801DBM_1F1 0x24ca
#define PCI_DEVICE_ID_INTEL_82801DBM_1F3 0x24c3
#define PCI_DEVICE_ID_INTEL_82801DBM_1F5 0x24c5
#define PCI_DEVICE_ID_INTEL_82801DBM_1F6 0x24c6
#define PCI_DEVICE_ID_INTEL_82801DBM_1D0 0x24c2
#define PCI_DEVICE_ID_INTEL_82801DBM_1D1 0x24c4
#define PCI_DEVICE_ID_INTEL_82801DBM_1D2 0x24c7
#define PCI_DEVICE_ID_INTEL_82801DBM_1D7 0x24cd
#define PCI_DEVICE_ID_INTEL_82801ER_1E0 0x244e
#define PCI_DEVICE_ID_INTEL_82801ER_1F0 0x24d0
#define PCI_DEVICE_ID_INTEL_82801ER_1F1 0x24db
#define PCI_DEVICE_ID_INTEL_82801ER_1F2 0x24d1
#define PCI_DEVICE_ID_INTEL_82801ER_1F2_R 0x24df
#define PCI_DEVICE_ID_INTEL_82801ER_1F3 0x24d3
#define PCI_DEVICE_ID_INTEL_82801ER_1F5 0x24d5
#define PCI_DEVICE_ID_INTEL_82801ER_1F6 0x24d6
#define PCI_DEVICE_ID_INTEL_82801ER_1D0 0x24d2
#define PCI_DEVICE_ID_INTEL_82801ER_1D1 0x24d4
#define PCI_DEVICE_ID_INTEL_82801ER_1D2 0x24d7
#define PCI_DEVICE_ID_INTEL_82801ER_1D3 0x24de
#define PCI_DEVICE_ID_INTEL_82801ER_1D7 0x24dd
#define PCI_DEVICE_ID_INTEL_82870_1E0 0x1461
#define PCI_DEVICE_ID_INTEL_82870_1F0 0x1460
#define PCI_DEVICE_ID_VIA_8601_0 0x0601
#define PCI_DEVICE_ID_VIA_82C416 0x1571
/* END OLDER USAGE */

View File

@@ -80,6 +80,7 @@ struct resource {
/* Generic resource helper functions */
struct device;
struct bus;
extern void compact_resources(struct device * dev);
extern struct resource *probe_resource(struct device *dev, unsigned index);
extern struct resource *new_resource(struct device * dev, unsigned index);
@@ -88,4 +89,13 @@ extern resource_t resource_end(struct resource *resource);
extern resource_t resource_max(struct resource *resource);
extern void report_resource_stored(struct device * dev, struct resource *resource, const char *comment);
typedef void (*resource_search_t)(void *gp, struct device *dev, struct resource *res);
extern void search_bus_resources(struct bus *bus,
unsigned long type_mask, unsigned long type,
resource_search_t search, void *gp);
extern void search_global_resources(
unsigned long type_mask, unsigned long type,
resource_search_t search, void *gp);
#endif /* RESOURCE_H */