soc/amd/glinda: Add support for A0 and B0 steppings

Update the A0 and B0 stepping IDs in CPU table per
the PPR document 57254 Rev 1.56 and 1.69

Change-Id: I0072f25f981ac7d5df2522594c8788bfabcbf24c
Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Anand Vaikar 2024-04-13 18:32:30 +05:30 committed by Felix Held
parent 70108382de
commit f8a46950cc
2 changed files with 4 additions and 3 deletions

View File

@ -25,7 +25,8 @@ static struct device_operations cpu_dev_ops = {
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, /* TODO: Update for Glinda */
{ X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_ALL_STEPPINGS_MASK },
{ X86_VENDOR_AMD, GLINDA_B0_CPUID, CPUID_ALL_STEPPINGS_MASK },
CPU_TABLE_END
};

View File

@ -3,6 +3,6 @@
#ifndef AMD_GLINDA_CPU_H
#define AMD_GLINDA_CPU_H
#define GLINDA_A0_CPUID CPUID_FROM_FMS(0x17, 0xa0, 0) /* TODO: Update for Glinda */
#define GLINDA_A0_CPUID CPUID_FROM_FMS(0x1a, 0x20, 0)
#define GLINDA_B0_CPUID CPUID_FROM_FMS(0x1a, 0x24, 0)
#endif /* AMD_GLINDA_CPU_H */