sravan/system76-coreboot
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Rename almost all occurences of LinuxBIOS to coreboot.

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Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2008-01-18 15:08:58 +00:00
committed by Stefan Reinauer
parent 7e61e45402
commit f8ee1806ac
388 changed files with 1718 additions and 1718 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/cpu/amd/car/copy_and_run.c
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@@ -23,7 +23,7 @@ static void copy_and_run(void)
uint8_t *src, *dst;
unsigned long ilen, olen;
print_debug("Copying LinuxBIOS to RAM.\r\n");
print_debug("Copying coreboot to RAM.\r\n");
#if !CONFIG_COMPRESS
__asm__ volatile (
@@ -55,7 +55,7 @@ static void copy_and_run(void)
print_debug_cp_run("linxbios_ram.bin length = ", olen);
print_debug("Jumping to LinuxBIOS.\r\n");
print_debug("Jumping to coreboot.\r\n");
__asm__ volatile (
"xorl %ebp, %ebp\n\t" /* cpu_reset for hardwaremain dummy */
@@ -73,7 +73,7 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr)
uint8_t *src, *dst;
unsigned long ilen, olen;
// print_debug("Copying LinuxBIOS AP code to CAR.\r\n");
// print_debug("Copying coreboot AP code to CAR.\r\n");
#if !CONFIG_COMPRESS
__asm__ volatile (
@@ -105,7 +105,7 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr)
// print_debug_cp_run("linxbios_apc.bin length = ", olen);
// print_debug("Jumping to LinuxBIOS AP code in CAR.\r\n");
// print_debug("Jumping to coreboot AP code in CAR.\r\n");
__asm__ volatile (
"movl %0, %%ebp\n\t" /* cpu_reset for hardwaremain dummy */

2
src/cpu/amd/car/disable_cache_as_ram.c
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@@ -21,7 +21,7 @@ static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
"wrmsr\n\t"
#endif
/* disable fixed mtrr from now on, it will be enabled by linuxbios_ram again*/
/* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
"movl $0xC0010010, %ecx\n\t"
// "movl $SYSCFG_MSR, %ecx\n\t"
"rdmsr\n\t"

2
src/cpu/amd/car/post_cache_as_ram.c
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@@ -104,7 +104,7 @@ static void post_cache_as_ram(void)
// wait for ap memory to trained
// wait_all_core0_mem_trained(sysinfox); // moved to lapic_init_cpus.c
#endif
/*copy and execute linuxbios_ram */
/*copy and execute coreboot_ram */
copy_and_run();
/* We will not return */

8
src/cpu/amd/model_gx2/vsmsetup.c
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@@ -10,7 +10,7 @@
/* what a mess this uncompress thing is. I am not at all happy about how this
* was done, but can't fix it yet. RGM
*/
#warning "Fix the uncompress once linuxbios knows how to do it"
#warning "Fix the uncompress once coreboot knows how to do it"
#include "../lib/nrv2b.c"
/* vsmsetup.c derived from vgabios.c. Derived from: */
@@ -71,7 +71,7 @@
*--------------------------------------------------------------------*/
/* Modified to be a self sufficient plug in so that it can be used
without reliance on other parts of core Linuxbios
without reliance on other parts of core coreboot
(C) 2005 Nick.Barker9@btinternet.com
Used initially for epia-m where there are problems getting the bios
@@ -320,10 +320,10 @@ struct realidt {
// that simplifies a lot of things ...
// we'll just push all the registers on the stack as longwords,
// and pop to protected mode.
// second, since this only ever runs as part of linuxbios,
// second, since this only ever runs as part of coreboot,
// we know all the segment register values -- so we don't save any.
// keep the handler that calls things small. It can do a call to
// more complex code in linuxbios itself. This helps a lot as we don't
// more complex code in coreboot itself. This helps a lot as we don't
// have to do address fixup in this little stub, and calls are absolute
// so the handler is relocatable.
void handler(void)

8
src/cpu/amd/model_lx/cache_as_ram.inc
View File

@@ -17,7 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define LX_STACK_BASE DCACHE_RAM_BASE /* this is where the DCache will be mapped and be used as stack, It would be cool if it was the same base as LinuxBIOS normal stack */
#define LX_STACK_BASE DCACHE_RAM_BASE /* this is where the DCache will be mapped and be used as stack, It would be cool if it was the same base as coreboot normal stack */
#define LX_STACK_END LX_STACK_BASE+(DCACHE_RAM_SIZE-1)
#define LX_NUM_CACHELINES 0x080 /* there are 128lines per way */
@@ -213,7 +213,7 @@ __main:
cld /* clear direction flag */
/* copy linuxBIOS from it's initial load location to
/* copy coreboot from it's initial load location to
* the location it is compiled to run at.
* Normally this is copying from FLASH ROM to RAM.
*/
@@ -363,8 +363,8 @@ crt_console_tx_string:
#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG)
.section ".rom.data"
str_copying_to_ram: .string "Copying LinuxBIOS to ram.\r\n"
str_pre_main: .string "Jumping to LinuxBIOS.\r\n"
str_copying_to_ram: .string "Copying coreboot to ram.\r\n"
str_pre_main: .string "Jumping to coreboot.\r\n"
.previous
#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */

6
src/cpu/amd/model_lx/vsmsetup.c
View File

@@ -75,7 +75,7 @@
*--------------------------------------------------------------------*/
/* Modified to be a self sufficient plug in so that it can be used
without reliance on other parts of core Linuxbios
without reliance on other parts of core coreboot
(C) 2005 Nick.Barker9@btinternet.com
Used initially for epia-m where there are problems getting the bios
@@ -341,10 +341,10 @@ struct realidt {
// that simplifies a lot of things ...
// we'll just push all the registers on the stack as longwords,
// and pop to protected mode.
// second, since this only ever runs as part of linuxbios,
// second, since this only ever runs as part of coreboot,
// we know all the segment register values -- so we don't save any.
// keep the handler that calls things small. It can do a call to
// more complex code in linuxbios itself. This helps a lot as we don't
// more complex code in coreboot itself. This helps a lot as we don't
// have to do address fixup in this little stub, and calls are absolute
// so the handler is relocatable.
void handler(void)

2
src/cpu/amd/sc520/sc520.c
View File

@@ -157,7 +157,7 @@ static void pci_domain_set_resources(device_t dev)
/* these are ENDING addresses, not sizes.
* if there is memory in this slot, then reg will be > rambits.
* So we just take the max, that gives us total.
* We take the highest one to cover for once and future linuxbios
* We take the highest one to cover for once and future coreboot
* bugs. We warn about bugs.
*/
if (reg > rambits)