sravan/system76-coreboot
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Rename almost all occurences of LinuxBIOS to coreboot.

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Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2008-01-18 15:08:58 +00:00
committed by Stefan Reinauer
parent 7e61e45402
commit f8ee1806ac
388 changed files with 1718 additions and 1718 deletions
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14
src/mainboard/iwill/dk8s2/Config.lb
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@@ -1,6 +1,6 @@
##
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
## (coreboot plus bootloader) will live in the boot rom chip.
##
if USE_FALLBACK_IMAGE
default ROM_SECTION_SIZE = FALLBACK_SIZE
@@ -12,18 +12,18 @@ end
##
## Compute the start location and size size of
## The linuxBIOS bootloader.
## The coreboot bootloader.
##
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
##
## Compute where this copy of linuxBIOS will start in the boot rom
## Compute where this copy of coreboot will start in the boot rom
##
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
##
## Compute a range of ROM that can cached to speed up linuxBIOS,
## Compute a range of ROM that can cached to speed up coreboot,
## execution speed.
##
## XIP_ROM_SIZE must be a power of 2.
@@ -95,7 +95,7 @@ end
end
##
## Build our 16 bit and 32 bit linuxBIOS entry code
## Build our 16 bit and 32 bit coreboot entry code
##
if USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/entry16.inc
@@ -115,7 +115,7 @@ if USE_DCACHE_RAM
end
##
## Build our reset vector (This is where linuxBIOS is entered)
## Build our reset vector (This is where coreboot is entered)
##
if USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/reset16.inc
@@ -145,7 +145,7 @@ mainboardinit cpu/amd/car/cache_as_ram.inc
end
###
### This is the early phase of linuxBIOS startup
### This is the early phase of coreboot startup
### Things are delicate and we test to see if we should
### failover to another image.
###