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Some more #if cleanup

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Replace #elif (CONFIG_FOO==1) with #elif CONFIG_FOO
find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]1),\1\2,g" {} +
(manual tweak since it hit a false positive)

Replace #elif (CONFIG_FOO==0) with #elif !CONFIG_FOO
find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]0),\1\!\2,g" {} +

Change-Id: I8f4ebf609740dfc53e79d5f1e60f9446364bb07d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1006
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2012-05-05 15:50:17 +02:00
committed by Stefan Reinauer
parent c0e16e7024
commit f8f00629e3
9 changed files with 22 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/cpu/amd/model_10xxx/init_cpus.c
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@ -111,7 +111,7 @@ static void for_each_ap(u32 bsp_apicid, u32 core_range, process_ap_t process_ap,
i * (nb_cfg_54 ? (siblings + 1) : 1) +
j * (nb_cfg_54 ? 1 : 64);
#if (CONFIG_ENABLE_APIC_EXT_ID == 1) && (CONFIG_APIC_ID_OFFSET > 0)
#if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET > 0)
#if !CONFIG_LIFT_BSP_APIC_ID
if ((i != 0) || (j != 0)) /* except bsp */
#endif
@ -274,7 +274,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
enable_lapic();
#if (CONFIG_ENABLE_APIC_EXT_ID == 1) && (CONFIG_APIC_ID_OFFSET > 0)
#if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET > 0)
u32 initial_apicid = get_initial_apicid();
#if !CONFIG_LIFT_BSP_APIC_ID
@ -331,7 +331,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
cpuSetAMDMSR();
#if CONFIG_SET_FIDVID
#if (CONFIG_LOGICAL_CPUS == 1) && CONFIG_SET_FIDVID_CORE0_ONLY
#if CONFIG_LOGICAL_CPUS && CONFIG_SET_FIDVID_CORE0_ONLY
// Run on all AP for proper FID/VID setup.
if (id.coreid == 0) // only need set fid for core0
#endif

2
src/cpu/amd/model_fxx/init_cpus.c
View File

@ -276,7 +276,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
u32 loop = 100;
#if CONFIG_SET_FIDVID
#if (CONFIG_LOGICAL_CPUS == 1) && CONFIG_SET_FIDVID_CORE0_ONLY
#if CONFIG_LOGICAL_CPUS && CONFIG_SET_FIDVID_CORE0_ONLY
if (id.coreid == 0) // only need set fid for core0
#endif
init_fidvid_ap(bsp_apicid, apicid);

2
src/cpu/x86/mtrr/earlymtrr.c
View File

@ -20,7 +20,7 @@ static void set_var_mtrr(
wrmsr(MTRRphysMask_MSR(reg), maskm);
}
#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0)
#if !defined(CONFIG_CACHE_AS_RAM) || !CONFIG_CACHE_AS_RAM
static void cache_lbmem(int type)
{
/* Enable caching for 0 - 1MB using variable mtrr */

2
src/cpu/x86/mtrr/mtrr.c
View File

@ -464,7 +464,7 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_var_mtrr_resource, &var_state);
#if (CONFIG_GFXUMA == 1) /* UMA or SP. */
#if CONFIG_GFXUMA /* UMA or SP. */
/* For now we assume the UMA space is at the end of memory below 4GB */
if (var_state.hole_startk || var_state.hole_sizek) {
printk(BIOS_DEBUG, "Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n");