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soc/intel/cannonlake: Hook up Microcode

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Hook Coffeelake U43e and Coffeelake H/S/E3 microcode into SOC and remove
the MICROCODE_BLOB_NOT_HOOKED_UP.

BUG=N/A
TEST=Boot up with coffeelake rvp board and check microcode revision in
coreboot log.

Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I6593081374dd4898a82db5b43c3b5bf154b3ef60
Reviewed-on: https://review.coreboot.org/c/30864
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lijian Zhao
2019-01-11 15:05:16 -08:00
committed by Nico Huber
parent 3afb84a245
commit f9154c5cc6
2 changed files with 5 additions and 1 deletions
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1
src/soc/intel/cannonlake/Kconfig
View File

@@ -46,7 +46,6 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP select PARALLEL_MP
select PARALLEL_MP_AP_WORK select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0 select PLATFORM_USES_FSP2_0
select MICROCODE_BLOB_NOT_HOOKED_UP
select POSTCAR_CONSOLE select POSTCAR_CONSOLE
select POSTCAR_STAGE select POSTCAR_STAGE
select REG_SCRIPT select REG_SCRIPT

5
src/soc/intel/cannonlake/Makefile.inc
View File

@@ -87,6 +87,11 @@ smm-y += gpio.c
verstage-y += gpio.c verstage-y += gpio.c
endif endif
# Coffeelake U43e D0
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin
# Coffeelake H/S/E3 B0 U0
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include