From f916b3cd8e1c8cebd323f8f9bbaac423d740b3ae Mon Sep 17 00:00:00 2001 From: Rex-BC Chen Date: Mon, 11 Jul 2022 14:23:35 +0800 Subject: [PATCH] soc/mediatek/mt8188: Add video/audio mtcmos setting Add power domain data for video and audio. TEST=build pass BUG=b:233720142 Signed-off-by: Garmin.Chang Change-Id: Ic5fd496cbc6904b42eae28a62bf00a71f0ef508d Reviewed-on: https://review.coreboot.org/c/coreboot/+/65752 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu --- src/soc/mediatek/mt8188/include/soc/spm.h | 48 +++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/src/soc/mediatek/mt8188/include/soc/spm.h b/src/soc/mediatek/mt8188/include/soc/spm.h index c388afba34..e2f4770443 100644 --- a/src/soc/mediatek/mt8188/include/soc/spm.h +++ b/src/soc/mediatek/mt8188/include/soc/spm.h @@ -953,6 +953,54 @@ struct dyna_load_pcm { struct pcm_desc desc; }; +static const struct power_domain_data disp[] = { + { + .pwr_con = &mtk_spm->vppsys0_pwr_con, + .pwr_sta_mask = BIT(11), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, + { + .pwr_con = &mtk_spm->vdosys0_pwr_con, + .pwr_sta_mask = BIT(13), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, + { + .pwr_con = &mtk_spm->vppsys1_pwr_con, + .pwr_sta_mask = BIT(12), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, + { + .pwr_con = &mtk_spm->vdosys1_pwr_con, + .pwr_sta_mask = BIT(14), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, + { + .pwr_con = &mtk_spm->edp_tx_pwr_con, + .pwr_sta_mask = BIT(17), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, +}; + +static const struct power_domain_data audio[] = { + { + .pwr_con = &mtk_spm->adsp_pwr_con, + .pwr_sta_mask = BIT(10), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, + { + .pwr_con = &mtk_spm->audio_pwr_con, + .pwr_sta_mask = BIT(8), + .sram_pdn_mask = BIT(8), + .sram_ack_mask = BIT(12), + }, +}; + int spm_init(void); #endif /* SOC_MEDIATEK_MT8188_SPM_H */