drivers/spi: Add controller protection type
Some SPI controllers support both READ and WRITE protection add a variable to the protect API for the callers to specify the kind of protection they want (Read/Write/Both). Also, update the callers and protect API implementation. BUG=None BRANCH=None TEST=test that the mrc cache is protected as expected on soraka. Also tried if the read protection is applied correctly. Change-Id: I093884c4768b08a378f21242ac82e430ac013d15 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/c/30559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Patrick Georgi
parent
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commit
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@ -1010,12 +1010,14 @@ static u32 spi_fpr(u32 base, u32 limit)
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* Returns 0 on success, -1 on failure of programming fpr registers.
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*/
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static int spi_flash_protect(const struct spi_flash *flash,
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const struct region *region)
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const struct region *region,
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const enum ctrlr_prot_type type)
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{
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ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr);
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u32 start = region_offset(region);
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u32 end = start + region_sz(region) - 1;
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u32 reg;
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u32 protect_mask = 0;
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int fpr;
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uint32_t *fpr_base;
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@ -1033,13 +1035,32 @@ static int spi_flash_protect(const struct spi_flash *flash,
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return -1;
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}
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switch (type) {
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case WRITE_PROTECT:
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protect_mask |= SPI_FPR_WPE;
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break;
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case READ_PROTECT:
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if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX))
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return -1;
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protect_mask |= ICH9_SPI_FPR_RPE;
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break;
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case READ_WRITE_PROTECT:
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if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX))
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return -1;
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protect_mask |= (ICH9_SPI_FPR_RPE | SPI_FPR_WPE);
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break;
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default:
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printk(BIOS_ERR, "ERROR: Seeking invalid protection!\n");
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return -1;
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}
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/* Set protected range base and limit */
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reg = spi_fpr(start, end) | SPI_FPR_WPE;
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reg = spi_fpr(start, end) | protect_mask;
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/* Set the FPR register and verify it is protected */
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write32(&fpr_base[fpr], reg);
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reg = read32(&fpr_base[fpr]);
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if (!(reg & SPI_FPR_WPE)) {
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if (!(reg & protect_mask)) {
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printk(BIOS_ERR, "ERROR: Unable to set SPI FPR %d\n", fpr);
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return -1;
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}
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