northbridge/intel/haswell: Fix undefined behavior

Fix reports found by undefined behavior sanitizer. Left shifting an int
where the right operand is >= the width of the type is undefined. Add
UL suffix since it's safe for unsigned types.

Change-Id: If2d34e4f05494c17bf9b9dec113b8f6863214e56
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Ryan Salsamendi
2017-06-30 17:29:37 -07:00
committed by Nico Huber
parent 889ce9c91e
commit fa0725dead
3 changed files with 13 additions and 7 deletions

View File

@@ -2979,7 +2979,7 @@
/* Ironlake */
#define CPU_VGACNTRL 0x41000
#define CPU_VGA_DISABLE (1<<31)
#define CPU_VGA_DISABLE (1UL<<31)
#define DIGITAL_PORT_HOTPLUG_CNTRL 0x44030
#define DIGITAL_PORTA_HOTPLUG_ENABLE (1 << 4)
@@ -4177,7 +4177,7 @@
#define HSW_PWR_WELL_CTL2 0x45404 /* Driver */
#define HSW_PWR_WELL_CTL3 0x45408 /* KVMR */
#define HSW_PWR_WELL_CTL4 0x4540C /* Debug */
#define HSW_PWR_WELL_ENABLE (1<<31)
#define HSW_PWR_WELL_ENABLE (1UL<<31)
#define HSW_PWR_WELL_STATE (1<<30)
#define HSW_PWR_WELL_CTL5 0x45410
#define HSW_PWR_WELL_ENABLE_SINGLE_STEP (1<<31)