Remove warnings from compilation of the s2892 with and without CBFS.
I didn't try to remove "defined but not used" warnings because there are too many ifdefs to be sure I wouldn't break something. For shadowed variable declarations I renamed the inner-most variable. The one in src/pc80/keyboard.c might need help. I didn't change the functionality but it looks like a bug. I boot tested it on s2892 and abuild tested it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -244,7 +244,6 @@
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#include "raminit.h"
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//struct definitions
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#if RAMINIT_SYSINFO==1
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struct link_pair_st {
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device_t udev;
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uint32_t upos;
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@@ -267,8 +266,6 @@ struct sys_info {
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uint32_t sblk;
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uint32_t sbbusn;
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} __attribute__((packed));
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#endif
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#endif
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@@ -218,8 +218,6 @@ unsigned long acpi_fill_slit(unsigned long current)
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}
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static int k8acpi_write_HT(void) {
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device_t dev;
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uint32_t dword;
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int len, lenp, i;
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len = acpigen_write_name("HCLK");
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@@ -3,6 +3,10 @@
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*
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*/
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#ifndef CACHE_AS_RAM_ADDRESS_DEBUG
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#define CACHE_AS_RAM_ADDRESS_DEBUG 0
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#endif
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static inline void print_debug_addr(const char *str, void *val)
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{
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#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
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@@ -11,6 +11,10 @@
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#define K8_HT_FREQ_1G_SUPPORT 0
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#endif
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#ifndef RAMINIT_SYSINFO
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#define RAMINIT_SYSINFO 0
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#endif
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#ifndef K8_SCAN_PCI_BUS
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#define K8_SCAN_PCI_BUS 0
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#endif
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@@ -79,7 +83,6 @@ static uint8_t ht_lookup_host_capability(device_t dev)
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static void ht_collapse_previous_enumeration(uint8_t bus, unsigned offset_unitid)
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{
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device_t dev;
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uint32_t id;
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//actually, only for one HT device HT chain, and unitid is 0
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#if HT_CHAIN_UNITID_BASE == 0
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@@ -90,6 +93,7 @@ static void ht_collapse_previous_enumeration(uint8_t bus, unsigned offset_unitid
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/* Check if is already collapsed */
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if((!offset_unitid) || (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
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uint32_t id;
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dev = PCI_DEV(bus, 0, 0);
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (!((id == 0xffffffff) || (id == 0x00000000) ||
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@@ -556,7 +560,9 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
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} while (last_unitid != next_unitid );
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#if HT_CHAIN_END_UNITID_BASE != 0x20
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out:
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#endif
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end_of_chain: ;
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#if HT_CHAIN_END_UNITID_BASE != 0x20
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@@ -288,7 +288,7 @@ static int reg_useable(unsigned reg,
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device_t goal_dev, unsigned goal_nodeid, unsigned goal_link)
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{
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struct resource *res;
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unsigned nodeid, link;
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unsigned nodeid, link=0;
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int result;
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res = 0;
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for(nodeid = 0; !res && (nodeid < FX_DEVS); nodeid++) {
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@@ -648,16 +648,16 @@ static void pci_domain_read_resources(device_t dev)
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/* Is this register allocated? */
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if ((base & 3) != 0) {
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unsigned nodeid, link;
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device_t dev;
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device_t reg_dev;
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nodeid = limit & 7;
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link = (limit >> 4) & 3;
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dev = __f0_dev[nodeid];
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if (dev) {
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reg_dev = __f0_dev[nodeid];
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if (reg_dev) {
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/* Reserve the resource */
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struct resource *resource;
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resource = new_resource(dev, 0x100 + (reg | link));
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if (resource) {
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resource->flags = 1;
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struct resource *reg_resource;
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reg_resource = new_resource(reg_dev, 0x100 + (reg | link));
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if (reg_resource) {
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reg_resource->flags = 1;
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}
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}
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}
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@@ -1222,20 +1222,20 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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/* Find which cpus are present */
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cpu_bus = &dev->link[0];
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for(i = 0; i < sysconf.nodes; i++) {
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device_t dev, cpu;
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device_t cpu_dev, cpu;
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struct device_path cpu_path;
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/* Find the cpu's pci device */
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dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
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if (!dev) {
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cpu_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
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if (!cpu_dev) {
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/* If I am probing things in a weird order
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* ensure all of the cpu's pci devices are found.
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*/
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int j;
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int local_j;
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device_t dev_f0;
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for(j = 0; j <= 3; j++) {
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dev = pci_probe_dev(NULL, dev_mc->bus,
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PCI_DEVFN(0x18 + i, j));
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for(local_j = 0; local_j <= 3; local_j++) {
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cpu_dev = pci_probe_dev(NULL, dev_mc->bus,
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PCI_DEVFN(0x18 + i, local_j));
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}
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/* Ok, We need to set the links for that device.
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* otherwise the device under it will not be scanned
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@@ -1243,19 +1243,19 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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dev_f0 = dev_find_slot(0, PCI_DEVFN(0x18+i,0));
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if(dev_f0) {
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dev_f0->links = 3;
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for(j=0;j<3;j++) {
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dev_f0->link[j].link = j;
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dev_f0->link[j].dev = dev_f0;
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for(local_j=0;local_j<3;local_j++) {
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dev_f0->link[local_j].link = local_j;
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dev_f0->link[local_j].dev = dev_f0;
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}
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}
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}
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e0_later_single_core = 0;
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if (dev && dev->enabled) {
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j = pci_read_config32(dev, 0xe8);
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if (cpu_dev && cpu_dev->enabled) {
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j = pci_read_config32(cpu_dev, 0xe8);
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j = (j >> 12) & 3; // dev is func 3
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printk_debug(" %s siblings=%d\n", dev_path(dev), j);
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printk_debug(" %s siblings=%d\n", dev_path(cpu_dev), j);
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if(nb_cfg_54) {
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// For e0 single core if nb_cfg_54 is set, apicid will be 0, 2, 4....
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@@ -1308,7 +1308,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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cpu = find_dev_path(cpu_bus, &cpu_path);
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/* Enable the cpu if I have the processor */
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if (dev && dev->enabled) {
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if (cpu_dev && cpu_dev->enabled) {
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if (!cpu) {
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cpu = alloc_dev(cpu_bus, &cpu_path);
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}
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@@ -1318,7 +1318,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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}
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/* Disable the cpu if I don't have the processor */
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if (cpu && (!dev || !dev->enabled)) {
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if (cpu && (!cpu_dev || !cpu_dev->enabled)) {
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cpu->enabled = 0;
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}
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@@ -805,7 +805,6 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz,
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};
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uint32_t map;
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uint32_t dch;
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map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP);
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map &= ~(0xf << (index * 4));
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@@ -1491,19 +1490,19 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
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/* Loop through and find a fast clock with a low latency */
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for(index = 0; index < 3; index++, latency++) {
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int value;
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int spd_value;
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if ((latency < 2) || (latency > 4) ||
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(!(latencies & (1 << latency)))) {
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continue;
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}
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value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
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if (value < 0) {
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spd_value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
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if (spd_value < 0) {
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goto hw_error;
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}
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/* Only increase the latency if we decreas the clock */
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if ((value >= min_cycle_time) && (value < new_cycle_time)) {
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new_cycle_time = value;
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if ((spd_value >= min_cycle_time) && (spd_value < new_cycle_time)) {
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new_cycle_time = spd_value;
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new_latency = latency;
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}
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}
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@@ -1527,7 +1526,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
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int latencies;
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int latency;
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int index;
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int value;
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int spd_value;
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if (!(dimm_mask & (1 << i))) {
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continue;
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}
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@@ -1554,13 +1553,13 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
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}
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/* Read the min_cycle_time for this latency */
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value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
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if (value < 0) goto hw_error;
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spd_value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
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if (spd_value < 0) goto hw_error;
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/* All is good if the selected clock speed
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* is what I need or slower.
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*/
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if (value <= min_cycle_time) {
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if (spd_value <= min_cycle_time) {
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continue;
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}
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/* Otherwise I have an error, disable the dimm */
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