support for new mobos and fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -32,7 +32,7 @@ uses MAINBOARD
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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uses MAX_CPUS
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uses MEMORY_HOLE
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#uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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@@ -49,6 +49,27 @@ uses USE_NORMAL_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses CONFIG_CHIP_CONFIGURE
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEBUG
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uses CONFIG_MAX_CPUS
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uses CONFIG_LOGICAL_CPUS
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uses MAX_PHYSICAL_CPUS
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uses LINUXBIOS_EXTRA_VERSION
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses CONFIG_VGABIOS
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uses CONFIG_REALMODE_IDT
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uses CONFIG_PCIBIOS
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uses VGABIOS_START
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uses SCSIFW_START
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#
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#uses CONFIG_LSI_SCSI_FW_FIXUP
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option HAVE_OPTION_TABLE=1
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option HAVE_MP_TABLE=1
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@@ -61,9 +82,19 @@ option k7=1
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option k8=1
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option ROM_SIZE=524288
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#option CONFIG_VGABIOS=1
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#option CONFIG_REALMODE_IDT=1
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#option CONFIG_PCIBIOS=1
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#option VGABIOS_START=0xfff8c000
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option SCSIFW_START=0xfff80000
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option HAVE_FALLBACK_BOOT=1
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# use the new chip configure code.
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option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_LSI_SCSI_FW_FIXUP=1
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### Customize our winbond superio chip for this motherboard
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@@ -82,7 +113,10 @@ option IRQ_SLOT_COUNT=13
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### Only worry about 2 micro processors
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###
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=2
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option MAX_CPUS=2
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option CONFIG_LOGICAL_CPUS=0
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option MAX_PHYSICAL_CPUS=2
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#
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###
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### Build code to setup a generic IOAPIC
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@@ -98,7 +132,7 @@ option CONFIG_IOAPIC=1
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### CPU identification depends on only variable MTRRs
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### being enabled.
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###
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option MEMORY_HOLE=0
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#option MEMORY_HOLE=0
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#
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###
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### Enable both fixed and variable MTRRS
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@@ -112,8 +146,8 @@ option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
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###
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### Clean up the motherboard id strings
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###
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#option MAINBOARD_PART_NUMBER="Solo7"
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#option MAINBOARD_VENDOR="AMD"
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option MAINBOARD_PART_NUMBER="S2880"
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option MAINBOARD_VENDOR="Tyan"
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#
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###
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### Call the final_mainboard_fixup function
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@@ -125,71 +159,108 @@ option FINAL_MAINBOARD_FIXUP=1
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
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###
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#option FALLBACK_SIZE=524288
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option FALLBACK_SIZE=98304
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE=65536
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###
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### Compute where this copy of linuxBIOS will start in the boot rom
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###
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#
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###
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### Compute a range of ROM that can cached to speed up linuxBIOS,
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### execution speed.
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###
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##expr XIP_ROM_SIZE = 65536
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##expr XIP_ROM_BASE = _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE
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##option XIP_ROM_SIZE=65536
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##option XIP_ROM_BASE=0xffff0000
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#
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## XIP_ROM_SIZE && XIP_ROM_BASE values that work.
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##option XIP_ROM_SIZE=0x8000
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##option XIP_ROM_BASE=0xffff8000
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## We don't use compressed image
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option CONFIG_COMPRESS=0
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## We do use compressed image
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option CONFIG_COMPRESS=1
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option USE_ELF_BOOT=1
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE=65536
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option CONFIG_CONSOLE_SERIAL8250=1
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option TTYS0_BAUD=115200
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##
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### Select the linuxBIOS loglevel
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##
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## EMERG 1 system is unusable
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## ALERT 2 action must be taken immediately
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## CRIT 3 critical conditions
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## ERR 4 error conditions
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## WARNING 5 warning conditions
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## NOTICE 6 normal but significant condition
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## INFO 7 informational
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## DEBUG 8 debug-level messages
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## SPEW 9 Way too many details
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## Request this level of debugging output
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option DEFAULT_CONSOLE_LOGLEVEL=8
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## At a maximum only compile in this level of debugging
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option MAXIMUM_CONSOLE_LOGLEVEL=9
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option DEBUG=1
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option AMD8111_DEV=0x5
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#
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00100000
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option _RAMBASE=0x004000
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##
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## Use a 64K stack
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##
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option STACK_SIZE=0x10000
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option STACK_SIZE=0x2000
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##
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## Use a 64K heap
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##
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option HEAP_SIZE=0x10000
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option HEAP_SIZE=0x2000
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#
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###
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### Compute the start location and size size of
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### The linuxBIOS bootloader.
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###
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option CONFIG_ROM_STREAM = 1
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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#
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# Arima hdama
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#
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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# 48K for SCSI FW
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option ROM_SIZE = 475136
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# 48K for SCSI FW and 48K for ATI ROM
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# option ROM_SIZE = 425984
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
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option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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option ROM_SECTION_OFFSET= 0
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard tyan/s2880
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payload ../eepro100.ebi
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payload ../../tg3--ide_disk.zelf
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end
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romimage "fallback"
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
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option USE_FALLBACK_IMAGE=1
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option HAVE_FALLBACK_BOOT=1
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option ROM_SECTION_SIZE = FALLBACK_SIZE
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option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard tyan/s2880
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payload ../eepro100.ebi
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payload ../../tg3.zelf
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end
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buildrom ROM_SIZE "normal" "fallback"
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