intel/fsp_baytrail: rename include folder baytrail to include/soc

This is to match the layout of the non-fsp baytrail to make comparisons
easier and possibly remove duplicate files.

Change-Id: I9a94842d724ab3826de711d398227e7bdc1045ff
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: https://review.coreboot.org/12686
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

src/mainboard/esd/atom15/acpi_tables.c

@@ -28,9 +28,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 void acpi_create_gnvs(global_nvs_t *gnvs)
 {

src/mainboard/esd/atom15/fadt.c

@@ -15,7 +15,7 @@
  */
 
 #include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {

src/mainboard/esd/atom15/gpio.c

@@ -15,7 +15,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /*

src/mainboard/esd/atom15/irqroute.h

@@ -17,8 +17,8 @@
 #ifndef IRQROUTE_H
 #define IRQROUTE_H
 
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
 
 /*
  *IR02h GFX      INT(A) 	- PIRQ A

src/mainboard/esd/atom15/romstage.c

@@ -15,12 +15,12 @@
  * GNU General Public License for more details.
  */
 
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include <baytrail/gpio.h>
-#include "chip.h"
+#include <soc/gpio.h>
+#include <soc/intel/fsp_baytrail/chip.h>
 
 /**
  * /brief mainboard call for setup that needs to be done before fsp init

src/mainboard/intel/bayleybay_fsp/acpi_tables.c

@@ -27,9 +27,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 void acpi_create_gnvs(global_nvs_t *gnvs)
 {

src/mainboard/intel/bayleybay_fsp/fadt.c

@@ -15,7 +15,7 @@
  */
 
 #include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {

src/mainboard/intel/bayleybay_fsp/gpio.c

@@ -15,7 +15,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /* NCORE GPIOs */

src/mainboard/intel/bayleybay_fsp/irqroute.h

@@ -16,8 +16,8 @@
 #ifndef IRQROUTE_H
 #define IRQROUTE_H
 
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
 
 /*
  *IR02h GFX      INT(A) 	- PIRQ A

src/mainboard/intel/bayleybay_fsp/romstage.c

@@ -25,13 +25,13 @@
 #include <cpu/x86/mtrr.h>
 #include <romstage_handoff.h>
 #include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/acpi.h>
+#include <soc/baytrail.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 
 /**

src/mainboard/intel/minnowmax/acpi_tables.c

@@ -28,9 +28,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 void acpi_create_gnvs(global_nvs_t *gnvs)
 {

src/mainboard/intel/minnowmax/fadt.c

@@ -15,7 +15,7 @@
  */
 
 #include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {

src/mainboard/intel/minnowmax/gpio.c

@@ -15,7 +15,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /*

src/mainboard/intel/minnowmax/irqroute.h

@@ -17,8 +17,8 @@
 #ifndef IRQROUTE_H
 #define IRQROUTE_H
 
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
 
 /*
  *IR02h GFX      INT(A) 	- PIRQ A

src/mainboard/intel/minnowmax/romstage.c

@@ -15,12 +15,12 @@
  * GNU General Public License for more details.
  */
 
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include <baytrail/gpio.h>
-#include "chip.h"
+#include <soc/gpio.h>
+#include <soc/intel/fsp_baytrail/chip.h>
 
 /**
  * /brief mainboard call for setup that needs to be done before fsp init

src/mainboard/siemens/mc_tcu3/acpi_tables.c

@@ -27,9 +27,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 void acpi_create_gnvs(global_nvs_t *gnvs)
 {

src/mainboard/siemens/mc_tcu3/fadt.c

@@ -15,7 +15,7 @@
  */
 
 #include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {

src/mainboard/siemens/mc_tcu3/gpio.c

@@ -15,7 +15,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /* NCORE GPIOs */

src/mainboard/siemens/mc_tcu3/irqroute.h

@@ -16,8 +16,8 @@
 #ifndef IRQROUTE_H
 #define IRQROUTE_H
 
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
 
 /*
  *IR02h GFX      INT(A) 	- PIRQ A

src/mainboard/siemens/mc_tcu3/lcd_panel.c

@@ -16,7 +16,7 @@
 #include <console/console.h>
 #include <string.h>
 #include "modhwinfo.h"
-#include "baytrail/gpio.h"
+#include "soc/gpio.h"
 #include "lcd_panel.h"
 #include "ptn3460.h"
 

src/mainboard/siemens/mc_tcu3/ptn3460.c

@@ -14,7 +14,7 @@
  */
 
 #include <console/console.h>
-#include "baytrail/i2c.h"
+#include "soc/i2c.h"
 #include "ptn3460.h"
 
 /** \brief This functions sets up the DP2LVDS-converter to be used with the

src/mainboard/siemens/mc_tcu3/romstage.c

@@ -25,13 +25,13 @@
 #include <cpu/x86/mtrr.h>
 #include <romstage_handoff.h>
 #include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/acpi.h>
+#include <soc/baytrail.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include "modhwinfo.h"