Do not disable PEG60 srcclk

Change-Id: I08808789e48f7e25d8419d752e238cc8c35c3df8
This commit is contained in:
Jeremy Soller
2020-11-16 21:19:39 -07:00
parent 3d0ab91fce
commit faa6da02cc

View File

@@ -252,7 +252,8 @@ chip soc/intel/tigerlake
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C22)"
register "srcclk_pin" = "3"
#TODO: Support disable/enable CPU RP clock
register "srcclk_pin" = "-1"
device generic 0 on end
end
end # PEG60 0x9A09