sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

spi: Add function to read flash status register

Browse Source 
Add a function that allows reading of the status register
from the SPI chip.  This can be used to determine whether
write protection is enabled on the chip.

BUG=chrome-os-partner:35209
BRANCH=haswell
TEST=build and boot on peppy

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240702
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545)

Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5
Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/241128
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/9730
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Duncan Laurie
2015-01-15 15:28:46 -08:00
committed by Patrick Georgi
parent 1968b58010
commit fb032398d2
9 changed files with 24 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/spi_flash.h
View File

@@ -40,12 +40,15 @@ struct spi_flash {
u8 erase_cmd;
u8 status_cmd;
int (*read)(struct spi_flash *flash, u32 offset,
size_t len, void *buf);
int (*write)(struct spi_flash *flash, u32 offset,
size_t len, const void *buf);
int (*erase)(struct spi_flash *flash, u32 offset,
size_t len);
int (*status)(struct spi_flash *flash, u8 *reg);
};
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs);