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util/inteltool: Add support for Alderlake P in inteltool

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TEST=Dump registers on Clevo NS70PU with Intel® Core™ i7-1260P

Document number: 626817, 630094, 655258

Change-Id: I2ba4ef7eee33d4dd762a05dd755de5e4d2e566dd
Signed-off-by: Kacper Stojek <kacper.stojek@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66825
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kacper Stojek
2022-08-17 10:28:20 +02:00
committed by Martin Roth
parent f7e52a7aa4
commit fb9110b9e4
6 changed files with 644 additions and 1 deletions
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8
util/inteltool/inteltool.h
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@@ -287,6 +287,10 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_I5000V 0x25d4
#define PCI_DEVICE_ID_INTEL_I5000P 0x25d8
#define PCI_DEVICE_ID_INTEL_ADL_P 0x5182
#define PCI_DEVICE_ID_INTEL_ADL_M 0x5187
#define PCI_DEVICE_ID_INTEL_RPL_P 0x519d
/* untested, but almost identical to D-series */
#define PCI_DEVICE_ID_INTEL_ATOM_NXXX 0xa010
@@ -357,7 +361,9 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_HX_8_8 0x4637 /* Alderlake HX 8+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_HX_6_8 0x463B /* Alderlake HX 6+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_HX_4_8 0x4623 /* Alderlake HX 4+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_6_8 0x4641 /* Alderlake P 6+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_4_8 0x4621 /* Alderlake P 4+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_2_8 0x4601 /* Alderlake P 2+8 */
/* Intel GPUs */
#define PCI_DEVICE_ID_INTEL_G35_EXPRESS 0x2982