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corrected irq and mp table according to new bus enumeration

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo
2004-04-28 18:49:24 +00:00
parent 500497fc34
commit fcdd571aee
3 changed files with 28 additions and 21 deletions
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16
src/mainboard/ibm/e325/mptable.c
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@@ -41,34 +41,34 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
device_t dev;
/* 8111 */
dev = dev_find_slot(0, PCI_DEVFN(0x03,0));
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} else {
printk_debug("ERROR - could not find PCI 0:03.0, using defaults\n");
printk_debug("ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(0, PCI_DEVFN(0x01,0));
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
} else {
printk_debug("ERROR - could not find PCI 0:01.0, using defaults\n");
printk_debug("ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(0, PCI_DEVFN(0x02,0));
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
} else {
printk_debug("ERROR - could not find PCI 0:02.0, using defaults\n");
printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
bus_8131_2 = 3;
}
}
@@ -85,14 +85,14 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
device_t dev;
uint32_t base;
/* 8131-1 apic #3 */
dev = dev_find_slot(0, PCI_DEVFN(0x01,1));
dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
if (dev) {
base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
base &= PCI_BASE_ADDRESS_MEM_MASK;
smp_write_ioapic(mc, 0x03, 0x11, base);
}
/* 8131-2 apic #4 */
dev = dev_find_slot(0, PCI_DEVFN(0x02,1));
dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
if (dev) {
base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
base &= PCI_BASE_ADDRESS_MEM_MASK;