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Remove copies of rtl8168.c

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One copy was slightly different, but all the differences were commented out

Change-Id: I3cc7b5621c681a1eb286f9b16ef3ebdce03abb6b
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1356
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2012-07-26 11:34:57 +02:00
committed by Stefan Reinauer
parent 82704c63b9
commit fce22e80d8
16 changed files with 32 additions and 181 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/drivers/Kconfig
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@@ -23,6 +23,7 @@ source src/drivers/emulation/Kconfig
source src/drivers/generic/Kconfig
source src/drivers/i2c/Kconfig
source src/drivers/oxford/Kconfig
source src/drivers/realtek/Kconfig
source src/drivers/sil/Kconfig
source src/drivers/trident/Kconfig
source src/drivers/ics/Kconfig

1
src/drivers/Makefile.inc
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@@ -23,6 +23,7 @@ subdirs-y += emulation
subdirs-y += generic
subdirs-y += i2c
subdirs-y += oxford
subdirs-y += realtek
subdirs-y += sil
subdirs-y += trident
subdirs-y += ics

6
src/drivers/realtek/Kconfig Normal file
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@@ -0,0 +1,6 @@
config RTL8168_ROM_DISABLE
bool "Disable RTL8168 ROM"
default n
help
Just enough of a driver to make coreboot not look for an Option ROM.
No configuration is necessary for the OS to pick up the device.

20
src/drivers/realtek/Makefile.inc Normal file
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@@ -0,0 +1,20 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 secunet Security Networks AG
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
driver-$(CONFIG_RTL8168_ROM_DISABLE) += rtl8168.c

0
src/mainboard/intel/d945gclf/rtl8168.c → src/drivers/realtek/rtl8168.c
View File

1
src/mainboard/getac/p470/Kconfig
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@@ -43,6 +43,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_1024
select GFXUMA
select CHANNEL_XOR_RANDOMIZATION
select RTL8168_ROM_DISABLE
config MAINBOARD_DIR
string

1
src/mainboard/getac/p470/Makefile.inc
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@@ -17,7 +17,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
driver-y += rtl8168.c
ramstage-$(CONFIG_HAVE_ACPI_SLIC) += acpi_slic.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c

77
src/mainboard/getac/p470/rtl8168.c
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@@ -1,77 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <delay.h>
// #define RTL8168_DEBUG 1
static void nic_init(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
// Nothing to do yet, but this has to be here to keep
// coreboot from trying to execute an option ROM.
#ifdef RTL8168_DEBUG
u8 reg8;
printk(BIOS_DEBUG, "Resetting device... ");
pci_write_config8(dev, 0x37, (1 << 4));
do {
reg8 = pci_read_config8(dev, 0x37);
reg8 &= (1 << 4);
} while (reg8);
printk(BIOS_DEBUG, "ok\n");
printk(BIOS_DEBUG, "Eeprom Auto-Load... ");
reg8 = pci_read_config8(dev, 0x50);
reg8 &= 0x3f;
reg8 |= (1 << 6);
pci_write_config8(dev, 0x50, reg8);
mdelay(3);
printk(BIOS_DEBUG, "ok\n");
#endif
}
static struct device_operations nic_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = nic_init,
.scan_bus = 0,
};
static const struct pci_driver rtl8168_nic __pci_driver = {
.ops = &nic_ops,
.vendor = 0x10ec,
.device = 0x8168,
};
#ifdef RTL8168_DEBUG
static const struct pci_driver rtl8129_nic __pci_driver = {
.ops = &nic_ops,
.vendor = 0x10ec,
.device = 0x8129,
};
#endif

1
src/mainboard/intel/d945gclf/Kconfig
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@@ -41,6 +41,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_512
select GFXUMA
select CHANNEL_XOR_RANDOMIZATION
select RTL8168_ROM_DISABLE
config MAINBOARD_DIR
string

2
src/mainboard/intel/d945gclf/Makefile.inc
View File

@@ -17,6 +17,4 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
driver-y += rtl8168.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c

1
src/mainboard/kontron/986lcd-m/Kconfig
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@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select GFXUMA
select CHANNEL_XOR_RANDOMIZATION
select OVERRIDE_CLOCK_DISABLE
select RTL8168_ROM_DISABLE
config MAINBOARD_DIR
string

2
src/mainboard/kontron/986lcd-m/Makefile.inc
View File

@@ -17,6 +17,4 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
driver-y += rtl8168.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c

49
src/mainboard/kontron/986lcd-m/rtl8168.c
View File

@@ -1,49 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* This code should work for all ICH* southbridges with a NIC. */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
static void nic_init(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
// Nothing to do yet, but this has to be here to keep
// coreboot from trying to execute an option ROM.
}
static struct device_operations nic_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = nic_init,
.scan_bus = 0,
};
static const struct pci_driver rtl8169_nic __pci_driver = {
.ops = &nic_ops,
.vendor = 0x10ec,
.device = 0x8168,
};

1
src/mainboard/roda/rk886ex/Kconfig
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@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_1024
select CHANNEL_XOR_RANDOMIZATION
select GFXUMA
select RTL8168_ROM_DISABLE
config MAINBOARD_DIR
string

1
src/mainboard/roda/rk886ex/Makefile.inc
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@@ -18,6 +18,5 @@
##
ramstage-y += m3885.c
driver-y += rtl8168.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c

49
src/mainboard/roda/rk886ex/rtl8168.c
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@@ -1,49 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* This code should work for all ICH* southbridges with a NIC. */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
static void nic_init(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
// Nothing to do yet, but this has to be here to keep
// coreboot from trying to execute an option ROM.
}
static struct device_operations nic_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = nic_init,
.scan_bus = 0,
};
static const struct pci_driver rtl8169_nic __pci_driver = {
.ops = &nic_ops,
.vendor = 0x10ec,
.device = 0x8168,
};