Documentation: x86 add sleep state and minimal memory setup
Document how to add the sleep state and minimal memory setup. TEST=None Change-Id: Ibebeef34269dbf2366f1bea6d734f6bade4e4028 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13446 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -82,6 +82,18 @@
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</ol>
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</li>
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<li>Enable <a target="_blank" href="fsp1_1.html#corebootFspDebugging">coreboot/FSP</a> debugging</li>
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<li>Determine the <a target="_blank" href="SoC/soc.html#PreviousSleepState">Previous Sleep State</a></li>
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<li>Enable DRAM:
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<ol type="A">
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<li>Implement the SoC
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<a target="_blank" href="SoC/soc.html#MemoryInit">MemoryInit</a>
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Support
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</li>
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<li>Implement the board support to read the
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<a target="_blank" href="Board/board.html#SpdData">Memory Timing Data</a>
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</li>
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</ol>
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</li>
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</ol>
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@@ -124,6 +136,32 @@
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<th>Where</th>
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<th>Testing</th>
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</tr>
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<tr>
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<td>DRAM</td>
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<td>
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Load SPD data: src/soc/mainboard/<Vendor>/<Board>/spd/<a target="_blank" href="Board/board.html#SpdData">spd.c</a><br>
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UPD Setup:
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<ul>
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<li>src/soc<Vendor>//<Chip Family>/romstage/<a target="_blank" href="SoC/soc.html#MemoryInit">romstage.c</a></li>
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<li>src/mainboard/<Vendor>/<Board>/<a target="_blank" href="Board/board.html#SpdData">romstage.c</a></li>
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</ul>
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FSP 1.1 MemoryInit called from src/drivers/intel/fsp1_1/<a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/drivers/intel/fsp1_1/raminit.c;hb=HEAD#l126">raminit.c</a>
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</td>
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<td>Select the following Kconfig values
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<ul>
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<li>DISPLAY_HOBS</li>
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<li>DISPLAY_UPD_DATA</li>
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</ul>
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Testing successful if:
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<ul>
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<li>MemoryInit UPD values are correct</li>
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<li>MemoryInit returns 0 (success) and</li>
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<li>The the message "ERROR - coreboot's requirements not met by FSP binary!"
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is not displayed
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</li>
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</ul>
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</td>
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</tr>
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<tr>
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<td>Serial Port</td>
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<td>
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@@ -150,6 +188,26 @@
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is displayed<br>
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</td>
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</tr>
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<tr>
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<td>MemoryInit</td>
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<td><a target="_blank" href="SoC/soc.html#MemoryInit">SoC</a> support<br>
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<a target="_blank" href="Board/board.html#SpdData">Board</a> support<br>
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</td>
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<td>Select the following Kconfig values
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<ul>
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<li>DISPLAY_HOBS</li>
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<li>DISPLAY_UPD_DATA</li>
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</ul>
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Testing successful if:
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<ul>
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<li>MemoryInit UPD values are correct</li>
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<li>MemoryInit returns 0 (success) and</li>
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<li>The the message "ERROR - coreboot's requirements not met by FSP binary!"
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is not displayed
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</li>
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</ul>
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</td>
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</tr>
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</table>
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