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intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses

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Now that MMCONF_SUPPORT_DEFAULT is enabled by default remove
the pcie explicit accesses. The default config accesses use
MMIO.

Change-Id: I58c4b021ac87a035ac2ec2b6b110b75e6d263ab4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3810
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki
2013-07-26 08:50:53 +03:00
parent 0cc33da553
commit fd98c65b9d
9 changed files with 67 additions and 67 deletions
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22
src/northbridge/intel/sandybridge/finalize.c
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@@ -26,17 +26,17 @@
void intel_sandybridge_finalize_smm(void)
{
pcie_or_config16(PCI_DEV_SNB, 0x50, 1 << 0); /* GGC */
pcie_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0); /* DPR */
pcie_or_config32(PCI_DEV_SNB, 0x78, 1 << 10); /* ME */
pcie_or_config32(PCI_DEV_SNB, 0x90, 1 << 0); /* REMAPBASE */
pcie_or_config32(PCI_DEV_SNB, 0x98, 1 << 0); /* REMAPLIMIT */
pcie_or_config32(PCI_DEV_SNB, 0xa0, 1 << 0); /* TOM */
pcie_or_config32(PCI_DEV_SNB, 0xa8, 1 << 0); /* TOUUD */
pcie_or_config32(PCI_DEV_SNB, 0xb0, 1 << 0); /* BDSM */
pcie_or_config32(PCI_DEV_SNB, 0xb4, 1 << 0); /* BGSM */
pcie_or_config32(PCI_DEV_SNB, 0xb8, 1 << 0); /* TSEGMB */
pcie_or_config32(PCI_DEV_SNB, 0xbc, 1 << 0); /* TOLUD */
pci_or_config16(PCI_DEV_SNB, 0x50, 1 << 0); /* GGC */
pci_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0); /* DPR */
pci_or_config32(PCI_DEV_SNB, 0x78, 1 << 10); /* ME */
pci_or_config32(PCI_DEV_SNB, 0x90, 1 << 0); /* REMAPBASE */
pci_or_config32(PCI_DEV_SNB, 0x98, 1 << 0); /* REMAPLIMIT */
pci_or_config32(PCI_DEV_SNB, 0xa0, 1 << 0); /* TOM */
pci_or_config32(PCI_DEV_SNB, 0xa8, 1 << 0); /* TOUUD */
pci_or_config32(PCI_DEV_SNB, 0xb0, 1 << 0); /* BDSM */
pci_or_config32(PCI_DEV_SNB, 0xb4, 1 << 0); /* BGSM */
pci_or_config32(PCI_DEV_SNB, 0xb8, 1 << 0); /* TSEGMB */
pci_or_config32(PCI_DEV_SNB, 0xbc, 1 << 0); /* TOLUD */
MCHBAR32_OR(0x5500, 1 << 0); /* PAVP */
MCHBAR32_OR(0x5f00, 1 << 31); /* SA PM */