amdfwtool: Add ISH header support for A/B recovery layout
Image Slot Header (ISH) is a new feature. The rom layout for A/B recovery with ISH: EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A 0x4A -> ISH B -> PSP L2 B -> BIOS L2 B The newer 55758 will updated about the boot priority and update retry in ISH header. Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@@ -235,6 +235,18 @@ typedef struct _amd_bios_entry {
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int level;
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} amd_bios_entry;
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typedef struct _ish_directory_table {
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uint32_t checksum;
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uint32_t boot_priority;
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uint32_t update_retry_count;
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uint8_t glitch_retry_count;
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uint8_t glitch_higherbits_reserved[3];
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uint32_t pl2_location;
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uint32_t psp_id;
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uint32_t slot_max_size;
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uint32_t reserved;
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} __attribute__((packed)) ish_directory_table;
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#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
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#define PSP_COOKIE 0x50535024 /* 'PSP$' */
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#define PSPL2_COOKIE 0x324c5024 /* '2LP$' */
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@@ -265,6 +277,7 @@ typedef struct _amd_cb_config {
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bool s0i3;
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bool have_mb_spl;
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bool recovery_ab;
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bool need_ish;
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} amd_cb_config;
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void register_fw_fuse(char *str);
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