AGESA: Drop unused northbridge/common
Change-Id: I8c783e966cf90c6def28d87f07903f50a11487d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2014 Sage Electronic Engineering, LLC
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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romstage-y += ../../../../device/dram/ddr3.c
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romstage-y += common.c
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ramstage-y += common.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Sage Electronic Engineering, LLC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "AGESA.h"
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#include "common.h"
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#include <device/dram/ddr3.h>
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#include <string.h>
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#include <cbfs.h>
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AGESA_STATUS common_ReadCbfsSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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{
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#ifdef __PRE_RAM__
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AGESA_READ_SPD_PARAMS *info = ConfigPtr;
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size_t spd_file_length;
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if (info->MemChannelId > CONFIG_AGESA_DDR3_CHANNEL_MAX)
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return AGESA_ERROR;
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if (info->SocketId != 0)
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return AGESA_ERROR;
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if (info->DimmId != 0)
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return AGESA_ERROR;
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char *spd_file;
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spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD_BIN,
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&spd_file_length);
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if (!spd_file)
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die("file [spd.bin] not found in CBFS");
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printk(BIOS_DEBUG, "\nCBFS SPD file length = 0x%x bytes\n", (unsigned int)spd_file_length);
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if (CONFIG_MULTIPLE_DDR_SPD) {
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struct multi_spd_info *spd_info = (struct multi_spd_info *)info->Buffer;
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printk(BIOS_DEBUG, "Multiple DDR SPD: using offset %d\n", spd_info->offset);
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if (spd_info->offset > (spd_file_length / spd_info->size))
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printk(BIOS_EMERG, "Multiple SPD offset is greater than SPD length\n");
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else {
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spd_file += spd_info->offset * spd_info->size;
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spd_file_length = spd_info->size;
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}
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}
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memcpy((char*)info->Buffer, spd_file, spd_file_length);
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u16 crc = spd_ddr3_calc_crc(info->Buffer, spd_file_length);
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if (crc == 0) {
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printk(BIOS_EMERG, "Error: Unable to calculate CRC on SPD\n");
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return AGESA_UNSUPPORTED;
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}
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if (((info->Buffer[SPD_CRC_LO] == 0) && (info->Buffer[SPD_CRC_HI] == 0))
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|| (info->Buffer[SPD_CRC_LO] != (crc & 0xff))
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|| (info->Buffer[SPD_CRC_HI] != (crc >> 8))) {
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printk(BIOS_WARNING, "SPD CRC %02x%02x is invalid, should be %04x\n",
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info->Buffer[SPD_CRC_HI], info->Buffer[SPD_CRC_LO], crc);
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info->Buffer[SPD_CRC_LO] = crc & 0xff;
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info->Buffer[SPD_CRC_HI] = crc >> 8;
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u16 i;
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printk(BIOS_SPEW, "\nDisplay the SPD");
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for (i = 0; i < spd_file_length; i++) {
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if ((i % 16) == 0x00)
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printk(BIOS_SPEW, "\n%02x: ",i);
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printk(BIOS_SPEW, "%02x ", info->Buffer[i]);
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}
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printk(BIOS_SPEW, "\n");
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}
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return AGESA_SUCCESS;
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#else
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return AGESA_UNSUPPORTED;
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#endif
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}
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@ -1,30 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Sage Electronic Engineering, LLC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _AGESA_COMMON_H_
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#define _AGESA_COMMON_H_
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#define SPD_CRC_HI 127
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#define SPD_CRC_LO 126
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struct multi_spd_info {
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u8 offset; // defines spd 0,1,...
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u8 size; // defines spd size
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};
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AGESA_STATUS
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common_ReadCbfsSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr);
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#endif
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