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haswell/lynxpoint: Drop remaining uses of ISLP method

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There's no need to dynamically differentiate between traditional and Low
Power platforms at runtime, and doing so makes code reuse more complex.

Change-Id: Id40f2f5f41db00487af9115eabee8874c2399030
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46785
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2020-10-25 23:08:04 +01:00
committed by Michael Niewöhner
parent 1fa487e1b3
commit fe91192bf5
3 changed files with 35 additions and 39 deletions
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14
src/northbridge/intel/haswell/acpi/ctdp.asl
View File

@@ -79,13 +79,13 @@ Scope (\_SB.PCI0.MCHC)
/* Calculate PL2 based on chip type */ /* Calculate PL2 based on chip type */
Method (CPL2, 1, NotSerialized) Method (CPL2, 1, NotSerialized)
{ {
If (\ISLP ()) { #if CONFIG(INTEL_LYNXPOINT_LP)
/* Haswell ULT PL2 = 25W */ /* Haswell ULT PL2 = 25W */
Return (25 * 8) Return (25 * 8)
} Else { #else
/* Haswell Mobile PL2 = 1.25 * PL1 */ /* Haswell Mobile PL2 = 1.25 * PL1 */
Return ((Arg0 * 125) / 100) Return ((Arg0 * 125) / 100)
} #endif
} }
/* Set Config TDP Down */ /* Set Config TDP Down */

6
src/southbridge/intel/lynxpoint/acpi/pch.asl
View File

@@ -10,12 +10,6 @@
Scope (\) Scope (\)
{ {
// Return TRUE if chipset is LynxPoint-LP
Method (ISLP, 0, NotSerialized)
{
Return (CONFIG(INTEL_LYNXPOINT_LP))
}
// IO-Trap at 0x800. This is the ACPI->SMI communication interface. // IO-Trap at 0x800. This is the ACPI->SMI communication interface.
OperationRegion (IO_T, SystemIO, 0x800, 0x10) OperationRegion (IO_T, SystemIO, 0x800, 0x10)
Field (IO_T, ByteAcc, NoLock, Preserve) Field (IO_T, ByteAcc, NoLock, Preserve)

54
src/southbridge/intel/lynxpoint/acpi/xhci.asl
View File

@@ -213,26 +213,27 @@ Device (XHCI)
^D0D3 = 0 ^D0D3 = 0
} }
If (\ISLP ()) { #if CONFIG(INTEL_LYNXPOINT_LP)
// Clear PCI 0xB0[14:13] // Clear PCI 0xB0[14:13]
^MB13 = 0 ^MB13 = 0
^MB14 = 0 ^MB14 = 0
// Clear MMIO 0x816C[14,2] // Clear MMIO 0x816C[14,2]
CLK0 = 0 CLK0 = 0
CLK1 = 0 CLK1 = 0
}
// Set MMIO 0x8154[31] // Set MMIO 0x8154[31]
CLK2 = 1 CLK2 = 1
If (\ISLP ()) { // Handle per-port reset if needed
// Handle per-port reset if needed LPS0 ()
LPS0 ()
// Set MMIO 0x80e0[15] // Set MMIO 0x80e0[15]
AX15 = 1 AX15 = 1
} #else
// Set MMIO 0x8154[31]
CLK2 = 1
#endif
Return () Return ()
} }
@@ -271,23 +272,24 @@ Device (XHCI)
^D0D3 = 0 ^D0D3 = 0
} }
If (\ISLP ()) { #if CONFIG(INTEL_LYNXPOINT_LP)
// Set PCI 0xB0[14:13] // Set PCI 0xB0[14:13]
^MB13 = 1 ^MB13 = 1
^MB14 = 1 ^MB14 = 1
// Set MMIO 0x816C[14,2] // Set MMIO 0x816C[14,2]
CLK0 = 1 CLK0 = 1
CLK1 = 1 CLK1 = 1
}
// Clear MMIO 0x8154[31] // Clear MMIO 0x8154[31]
CLK2 = 0 CLK2 = 0
If (\ISLP ()) { // Clear MMIO 0x80e0[15]
// Clear MMIO 0x80e0[15] AX15 = 0
AX15 = 0 #else
} // Clear MMIO 0x8154[31]
CLK2 = 0
#endif
// Put device in D3 // Put device in D3
^D0D3 = 3 ^D0D3 = 3