soc/intel/alderlake: add GPIO definitions for PCH-S

Add GPIO definitions for ADL-S, similarly to how TGL/TGL-H handles
the split.

Based on:
- Intel PCH-S EDS Vol2 (#621483)
- Alderlake-S FSP
- slimbootloader sources
- Linux alderlake-pinctrl driver

Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Michał Kopeć
2022-04-07 14:14:31 +02:00
committed by Felix Held
parent 619bb07494
commit febaf2f413
9 changed files with 1160 additions and 12 deletions

View File

@@ -18,7 +18,7 @@
#include <intelpch/lockdown.h>
#include <intelblocks/tcss.h>
#include <soc/cpu.h>
#include <soc/gpio_soc_defs.h>
#include <soc/gpio.h>
#include <soc/intel/common/vbt.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>