broadwell: Add configuration for tuning VR for C-state operations
Add some configuration options that allow tuning the VR for C-state settings that may be able to reduce noise. - Add option to enable slow VR ramp rate for C-state exit - Add variable to configure the minimum C6/C7 voltage BUG=chrome-os-partner:34771 BRANCH=broadwell TEST=build and boot on samus Change-Id: I01445d62fbfcf200b787b924d8d72685819a4715 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: ed8f355e60292c82791817ae31bff58ac2390a72 Original-Change-Id: I8af75b69c8b55d3e210170ee96f8e22c2fd76374 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/241950 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9497 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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						Stefan Reinauer
					
				
			
			
				
	
			
			
			
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			@@ -130,6 +130,28 @@ struct soc_intel_broadwell_config {
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	/* Enable S0iX support */
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	int s0ix_enable;
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	/*
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	 * Minimum voltage for C6/C7 state:
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	 * 0x67 = 1.6V (full swing)
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	 *  ...
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	 * 0x79 = 1.7V
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	 *  ...
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	 * 0x83 = 1.8V (no swing)
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	 */
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	int vr_cpu_min_vid;
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	/*
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	 * Set slow VR ramp rate on C-state exit:
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	 * 0 = Fast VR ramp rate / 2
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	 * 1 = Fast VR ramp rate / 4
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	 * 2 = Fast VR ramp rate / 8
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	 * 3 = Fast VR ramp rate / 16
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	 */
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	int vr_slow_ramp_rate_set;
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	/* Enable slow VR ramp rate */
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	int vr_slow_ramp_rate_enable;
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	/* Deep SX enable */
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	int deep_sx_enable_ac;
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	int deep_sx_enable_dc;
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@@ -180,6 +180,8 @@ static u32 pcode_mailbox_read(u32 command)
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static void initialize_vr_config(void)
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{
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	device_t dev = SA_DEV_ROOT;
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	config_t *conf = dev->chip_info;
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	msr_t msr;
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	printk(BIOS_DEBUG, "Initializing VR config.\n");
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@@ -203,17 +205,27 @@ static void initialize_vr_config(void)
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	msr.hi |= (0x200 << (40 - 32)); /* 1.0 */
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	/* Set IOUT_OFFSET to 0. */
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	msr.hi &= ~0xff;
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	/* Set exit ramp rate to fast. */
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	msr.hi |= (1 << (50 - 32));
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	/* Set entry ramp rate to slow. */
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	msr.hi &= ~(1 << (51 - 32));
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	/* Enable decay mode on C-state entry. */
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	msr.hi |= (1 << (52 - 32));
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	/* Set the slow ramp rate to be fast ramp rate / 4 */
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	/* Set the slow ramp rate */
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	msr.hi &= ~(0x3 << (53 - 32));
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	/* Configure the C-state exit ramp rate. */
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	if (conf->vr_slow_ramp_rate_enable) {
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		/* Configured slow ramp rate. */
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		msr.hi |= ((conf->vr_slow_ramp_rate_set & 0x3) << (53 - 32));
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		/* Set exit ramp rate to slow. */
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		msr.hi &= ~(1 << (50 - 32));
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	} else {
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		/* Fast ramp rate / 4. */
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		msr.hi |= (0x01 << (53 - 32));
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		/* Set exit ramp rate to fast. */
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		msr.hi |= (1 << (50 - 32));
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	}
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	/* Set MIN_VID (31:24) to allow CPU to have full control. */
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	msr.lo &= ~0xff000000;
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	msr.lo |= (conf->vr_cpu_min_vid & 0xff) << 24;
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	wrmsr(MSR_VR_MISC_CONFIG, msr);
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	/*  Configure VR_MISC_CONFIG2 MSR. */
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