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northbridge/intel/i440bx: Remove commented code

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Change-Id: I0dd8c32f1b9165fe8c449cee1c21a155a725c04f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16878
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2016-10-04 20:44:48 +02:00 committed by Martin Roth
parent f10b5ff8a9
commit ff25b6c35b
1 changed files with 0 additions and 16 deletions
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16
src/northbridge/intel/i440bx/raminit.c
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@ -423,11 +423,6 @@ static void do_ram_command(u32 command)
addr = (void *)((dimm_start * 8 * 1024 * 1024) + addr_offset); addr = (void *)((dimm_start * 8 * 1024 * 1024) + addr_offset);
if (dimm_end > dimm_start) { if (dimm_end > dimm_start) {
#if 0
PRINT_DEBUG(" Sending RAM command 0x%04x to 0x%08x\n",
reg16, addr);
#endif
read32(addr); read32(addr);
} }
@ -634,10 +629,6 @@ void sdram_set_registers(void)
reg &= register_values[i + 1]; reg &= register_values[i + 1];
reg |= register_values[i + 2] & ~(register_values[i + 1]); reg |= register_values[i + 2] & ~(register_values[i + 1]);
pci_write_config8(NB, register_values[i], reg); pci_write_config8(NB, register_values[i], reg);
#if 0
PRINT_DEBUG(" Set register 0x%02x to 0x%02x\n",
register_values[i], reg);
#endif
} }
} }
@ -885,10 +876,6 @@ static void set_dram_row_attributes(void)
drb &= 0xff; drb &= 0xff;
drb |= (drb + (sz.side2 / 8)) << 8; drb |= (drb + (sz.side2 / 8)) << 8;
} else { } else {
#if 0
PRINT_DEBUG("No DIMM found in slot %d\n", i);
#endif
/* If there's no DIMM in the slot, set dra to 0x00. */ /* If there's no DIMM in the slot, set dra to 0x00. */
dra = 0x00; dra = 0x00;
/* Still have to propagate DRB over. */ /* Still have to propagate DRB over. */
@ -897,9 +884,6 @@ static void set_dram_row_attributes(void)
} }
pci_write_config16(NB, DRB + (2 * i), drb); pci_write_config16(NB, DRB + (2 * i), drb);
#if 0
PRINT_DEBUG("DRB has been set to 0x%04x\n", drb);
#endif
/* Brings the upper DRB back down to be base for /* Brings the upper DRB back down to be base for
* DRB calculations for the next two rows. * DRB calculations for the next two rows.