soc/intel/apollolake: Enable write-protect SPI flash range support

Use intel common infrastructure to enable support for write-protecting
SPI flash range. Also, enable this protection for RW_MRC_CACHE.

BUG=chrome-os-partner:58896
TEST=Verified that write to RW_MRC_CACHE fails in OS using
"flashrom -p host -i RW_MRC_CACHE -w /tmp/test.bin"

Change-Id: I35df12bc295d141e314ec2cb092d904842432394
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17117
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

src/soc/intel/apollolake/Kconfig

@@ -34,6 +34,7 @@ config CPU_SPECIFIC_OPTIONS
 	select HAVE_SMI_HANDLER
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
+	select MRC_SETTINGS_PROTECT
 	select NO_FIXED_XIP_ROM_SIZE
 	select NO_XIP_EARLY_STAGES
 	select PARALLEL_MP
@@ -52,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
 	select SOC_INTEL_COMMON_LPSS_I2C
 	select SOC_INTEL_COMMON_SMI
+	select SOC_INTEL_COMMON_SPI_PROTECT
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
 	select TSC_MONOTONIC_TIMER