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Author SHA1 Message Date
Eric Biederman
26e32760f9 - Remove unused start_stop.h 
This file died with the last round of cpu restructuring I just missed it earlier.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 20:11:15 +00:00
Eric Biederman
8bcb8a2ada - Don't use e7501 root_complex 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 18:32:20 +00:00
Eric Biederman
ab49946a56 - Remove e7501 root_complex 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 18:31:31 +00:00
Ronald G. Minnich
52c2277a1b adl855pc support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 15:12:48 +00:00
Eric Biederman
132368b4c5 - Clean up the CPP output a little bit 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-09 08:59:23 +00:00
Eric Biederman
a649a411d7 - Fix silly thinkos in that caused parsing problems in romcc. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-09 00:35:39 +00:00
Eric Biederman
7dd185c885 - Fix minor glitch in romcc where it would not return from a header file 
if it had a preprocessor directive on the last line.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-09 00:05:42 +00:00
Yinghai Lu
12eb7bc5ad *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-08 21:16:16 +00:00
Eric Biederman
41203d9b77 - Romcc preprocessor bug fixes, (The code size went down about 350 lines.. :) 
- Preprocessor constant expression evaluation is no long a special case so
  unsigned long values can not be used.
- Undefined macros are not converted to 0.  But a big warning is printed.
- Garbage at the of an #include directive is now done in tokens instead of
  in characters.
  This allows comments after an #include directive.
- Repaired a previously unnoticed regression in constant expression
  evaluation.  Logical expressions can now be evaluated again.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-08 09:31:09 +00:00
Stefan Reinauer
dc9e6e35c4 add compiler from crosstool, too 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1766 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 23:19:46 +00:00
Yinghai Lu
ad00d73998 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:14:33 +00:00
Yinghai Lu
44b34e31a5 CONFIG_CHIP_NAME to control config chip.h without .name 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:03:37 +00:00
Eric Biederman
7a9c836f93 - How did I forget to cvs add this? 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1763 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 19:55:46 +00:00
Eric Biederman
692f2c7aed - First pass at getting the powerpc ports to compile 
The static device tree is not built properly at all yet, but at least we get through it.
  FIXME (What is the proper way to handle add in boards?)
- Add generic div64 support and ppc div64 support
- Fix abuild so it properly generates the CC line when cross compiling.
- Add one more possible ppc cross compiler target


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 19:55:06 +00:00
Yinghai Lu
cd51e6ad90 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 18:09:46 +00:00
Stefan Reinauer
2f285ae709 remove nasty workaround, include echo in function again :) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1760 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 14:06:24 +00:00
Stefan Reinauer
173f13b81f add debug function 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 11:57:00 +00:00
Stefan Reinauer
d4c6846f41 ... 
add option so it's possible to ignore broken builds


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 11:47:41 +00:00
Eric Biederman
1a003244d6 - Add another possible powerpc cross compiler prefix 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 11:41:26 +00:00
Eric Biederman
ca883c915a - More fixes... 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 11:24:57 +00:00
Eric Biederman
709850a21b - Ensure every copy of Options.lb uses: 
CROSS_COMPILE
  CC
  HOSTCC
  OBJCOPY


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 10:48:04 +00:00
Eric Biederman
d0805e0b55 - Ensure the all target is the first commands in the makefile.... 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 09:03:47 +00:00
Eric Biederman
1c1b858f0f - Put the rule for the Makefile at the bottom of the makefile! 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 08:57:09 +00:00
Eric Biederman
c149210462 - In the makefile header get the name of the Makefile correct 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 08:50:54 +00:00
Eric Biederman
0e99655670 - Massage the code to generate the top level Makefile so the 
generated Makefile has correct dependencies and is somewhat complete.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 08:21:05 +00:00
Eric Biederman
41d0fa38af - Modify all of the Opteron motherboards to have a separate logical 
chip for the amdk8/root_complex


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:26:56 +00:00
Eric Biederman
8bd555297e - Add a new chip northbridge/amd/amdk8/root_complex 
- Moving the functionality around in northbridge/amd/amdk8/northbridge.c
  to put the pci_domain and the apic bus on the root_complex.
  Everything else remains with the individual northbridges.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:04:54 +00:00
Yinghai Lu
7bf1b48bd4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 03:44:01 +00:00
Stefan Reinauer
3779f6a4cb stepan goes to bed now. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1747 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 00:26:31 +00:00
Stefan Reinauer
d87ce961f6 - some steps towards cross compile 
- add option to force rebuilds even if they were previously ok
- add option to build on target only
- play around


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 00:25:19 +00:00
Li-Ta Lo
9562049df5 reformat 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 23:42:54 +00:00
Yinghai Lu
b2d77282e0 debug device added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 22:36:18 +00:00
Li-Ta Lo
652ae6f533 we decide not to enable BM DAM form them 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:48:39 +00:00
Yinghai Lu
8085f032f8 SI Class code check 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:00:13 +00:00
Li-Ta Lo
2d2bdd3846 removed #if 0 #endif code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 20:31:04 +00:00
Li-Ta Lo
f84926efca tell people that the segment descriptors are different for ROMCC and 
GCC code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 18:36:06 +00:00
Li-Ta Lo
1995f1af35 removed the comment in the very beginning of hardwaremain(). I don't 
think it is relevant now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 18:33:33 +00:00
Eric Biederman
23bc47db17 Add Options.lb to various motherboard ports 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1738 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:09:12 +00:00
Eric Biederman
018d8dd60f - Update abuild.sh so it will rebuild successfull builds 
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:04:33 +00:00
Yinghai Lu
4403f60823 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-03 00:47:40 +00:00
Stefan Reinauer
e507c85fe3 This hurts more than it helps. byebye 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-03 00:10:15 +00:00
Stefan Reinauer
e4932dc760 get qemu-i386 target building again 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1734 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 20:33:12 +00:00
Stefan Reinauer
c3f3e9abf4 update to new structure 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1733 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 20:29:30 +00:00
Yinghai Lu
bf8bb42d6a *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 18:05:22 +00:00
Yinghai Lu
3974363f09 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 17:46:43 +00:00
Yinghai Lu
9434c1b661 Tyan update for ROM_IMAGE_SIZE > 64K 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 02:34:28 +00:00
Stefan Reinauer
0979969732 fix solo 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-31 23:03:10 +00:00
Eric Biederman
432aa6a255 - Update console.c to have non-inline versions of functions 
- Add exception.c
  Sorry for not including these ealier.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-30 22:59:35 +00:00
Eric Biederman
f8a2dddb57 - To reduce confuse rename the parts of linuxbios bios that run from 
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-30 08:05:41 +00:00
Mark Wilkinson
0afcba7a3d Changes to allow Via/Epia code to be compiled after recent code changes. 
New Files :-
	src/cpu/via/model_centaur/Config.lb
	src/cpu/via/model_centaur/model_centaur_init.c

Updated Files :-
	src/arch/i386/include/arch/smp/mpspec.h
		- make write_smp_table a define for non smp systems
	src/cpu/x86/lapic/lapic_cpu_init.c
		- change possible typo
	src/mainboard/via/epia/Config.lb
	src/mainboard/via/epia/Options.lb

	src/mainboard/via/epia/auto.c
	src/mainboard/via/epia/chip.h
	src/mainboard/via/epia/failover.c
		- updated after recent code changes
	src/northbridge/via/vt8601/chip.h
	src/northbridge/via/vt8601/northbridge.c
	src/northbridge/via/vt8601/raminit.c
		- corrections after recent code changes to allow compiling
	src/southbridge/via/vt8231/chip.h
	src/southbridge/via/vt8231/vt8231.c
		- initial pass to allow compiling after recent code changes.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-29 16:16:43 +00:00