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142e6f5ecfcba4c1c2fd6b7e015cb215d16f34fc
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8 Commits

Author SHA1 Message Date
G.Pangao
142e6f5ecf soc/mediatek/mt8192: eint: unmask eint event mask register 
eint event mask register is used to mask eint wakeup source on mt8192.
All wakeup sources are masked by default. Since most MediaTek SoCs do
not have this design, we can't modify the kernel eint upstream driver to
solve the issue 'Can't wake using power button (cros_ec) or touchpad'.
So we add a driver here to unmask all wakeup sources.

BUG=b:169024614

Signed-off-by: G.Pangao <gtk_pangao@mediatek.com>
Change-Id: I8ee80bf8302c146e09b74e9f6c6c49f501d7c1c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46409
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-12-30 06:04:10 +00:00
Yuchen Huang
b0ab41e027 soc/mediatek/mt8192: add rtc MT6359P driver 
Add rtc MT6359P driver for rtc init and rtc eosc calibration. Refactor
mt8173 and mt8183 code by extracting common API. Move rtc_read and
rtc_write to each SoC folder, because mt8173 and mt8183 access rtc via
pmic wrapper, while mt8192 accesses it via pmif.

Reference datasheet:
  Document No: RH-D-2018-0101.

Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com>
Change-Id: I57d6738fdec148c7458b2024a0a8225415ca2f3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
 2020-12-28 13:39:01 +00:00
Hsin-Hsiung Wang
9247d12839 soc/mediatek/mt8192: add pmic MT6315 driver 
MT6315 is a buck converter for Mediatek MT8192 platform.
Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616.

BUG=b:155253454
BRANCH=none
TEST=boot asurada correctly

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45400
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-11-18 06:12:50 +00:00
Hsin-Hsiung Wang
ed7bb85031 soc/mediatek/mt8192: add pmic MT6359P driver 
MT6359P is a PMIC chipset for Mediatek MT8192 platform.
Reference datasheet: MT6359_PMIC_Data_Sheet_V1.5.docx, RH-D-2018-0205.

BUG=b:155253454
BRANCH=none
TEST=boot asurada correctly

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I62f69490165539847b8b7260942644533b15285b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45399
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-11-18 06:12:25 +00:00
Hsin-Hsiung Wang
22f8370def soc/mediatek/mt8192: add pmif driver 
MT8192 uses power management interface (PMIF) to access pmics by spmi
and spi, so we add pmif driver to control pmics.

BUG=b:155253454
BRANCH=none
TEST=boot asurada correctly

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I32fc28f72d9522133baa06f9d67c383f814d862c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45398
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-11-18 06:12:09 +00:00
CK Hu
804b3bd10f soc/mediatek/mt8192: Init PLL in bootblock 
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: If16d244e07d9f369efd991132587a92e38200b45
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
 2020-09-17 06:56:55 +00:00
CK Hu
43f0dcbb77 soc/mediatek/mt8192: Initialize watch dog in bootblock 
Initialize watch dog so the system won't reboot on timeout.
In addition, print the reason of reboot triggered by watch dog.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: I7e849659700218f1c50365c2d68a32be2f703d94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
 2020-08-17 04:05:45 +00:00
CK Hu
d8b8cc04f3 soc/mediatek/mt8192: Initialize mmu in bootblock 
Initialize CPU mmu and config range.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: I5ba405dab87d51d373704657ccb44c07c7249041
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
 2020-08-17 04:05:35 +00:00