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5180 Commits

Author SHA1 Message Date
Zheng Bao
7c5ad88887 amdfwtool: Add universal cleanup function 
Change-Id: Icc0cb79c06614aa2976d250dc73b8dc4040fd28c
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73119
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-27 18:01:27 +00:00
Zheng Bao
c38f76410b amdfwtool: Add missing parentheses in macro definition 
Change-Id: I1b43dbb8cdc748960f25d7b0629aa81528a2a476
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-24 23:09:31 +00:00
Zheng Bao
c26108f603 amdfwtool: Change the growing pointer with cautions 
Changing the pointer outside the function is not allowed.
Check if it overflows everytime it changes.

TEST=Binary identical on amd/birman amd/chausie amd/majolica
amd/gardenia pcengines/apu2 amd/mandolin

Change-Id: I2c295b489d833201f1ba86a7759ea7dc0e1e672f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-24 23:09:02 +00:00
Zheng Bao
71e752b934 amdfwtool: Remove the useless variable "rom" 
Now we use ctx.rom. Remove the wrong statement releasing null
pointer.

Change-Id: I134335ed741dc067e232621106f2057e50ba6a1a
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73118
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-24 13:42:23 +00:00
Elias Souza
17d9d897f0 crossgcc: Replace binutils no-bfd-doc patch with configure option 
It is not more necessary to patch binutils, we can
pass an argument during build time to not build docs.
Regenerate binutils-2.37_no-makeinfo.patch.

Change-Id: If600f0bb46db5f84956940683a7adc83eaca01e5
Signed-off-by: Elias Souza <eliascontato@protonmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73115
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
 2023-02-19 16:08:26 +00:00
Kyle Lin
05d6f5a488 util/spd_tools/src/spd_gen/lp5.go: Support LP5X 8533Mbps 
Add support for LP5X 8533Mbps in SPD tool.

BUG=b:263189532
TEST=None

Change-Id: I72b02514f68647dda996822f910db8bc93f61ca4
Signed-off-by: Kyle Lin <kylelinck@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73038
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marx Wang <marx.wang@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
 2023-02-18 16:00:06 +00:00
Felix Singer
36847977cb util/crossgcc: Update GCC from 11.2 to 11.3 
While the work on updating GCC to version 12 is still WIP, update it
to the latest minor release 11.3.

Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I8810bbb238b01985774ff8da1e246ab1b192e663
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70221
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
 2023-02-17 15:01:48 +00:00
Elyes Haouas
2ed4b0bd7c lint/checkpatch.pl: Remove check for keyword 'boolean' in Kconfig 
We can not use 'boolean' since commit 53ea1d44 "util/kconfig: Uprev to Linux 5.13's kconfig".
This also reduce difference with upstream.

Change-Id: Iff9fbde46784547c07726816d2fdd71967e0595e
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-02-17 14:50:29 +00:00
Martin Roth
60f367a473 util/release: Update build-release script 
- Make variables for the release name and the tarballs instead of
writing them out every time.
- Skip some more unnecessary files when creating the tarballs.
- Remove unnecessary check for the commit ID. It's now a required field.
- Correctly get and save the time of the last release for use in
creating the tarballs.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I56cd5e2dcf01ee55e5d45e837db2f89904b06ddd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-02-15 13:08:45 +00:00
Zheng Bao
4bfb36ed68 amdfwtool: use SoC ID info instead of misleading comboable flag 
Since it actually depends on the SoC type whether the old PSP
directory table pointer or the new comboable PSP directory table
pointer is used in EFS, get this information from the SoC ID instead
of passing the comboable flag for the SoCs that need to use the new
comboable PSP directory table pointer.

TEST=Binary identical on amd/majolica, pcengines/apu2, amd/gardenia

Change-Id: I0c3f21065939d1b13c2607aba16cbef74dd8d389
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-02-14 18:24:08 +00:00
Zheng Bao
6a1af48c58 amdfwtool: Remove command line option soc-name 
5/5
of split changes of https://review.coreboot.org/c/coreboot/+/58552/28

Change-Id: Iba2ebd5d0310538e04c07493d28039509ad02321
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-13 13:46:43 +00:00
Iru Cai
9874b1a7de util/autoport: Fix the typo of ehci2 in bd82x6x.go 
This corrects the word "echi2" to "ehci2".

Change-Id: Id8911de147538f4614627cfca449bad528ab6780
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
 2023-02-13 05:45:23 +00:00
Zheng Bao
010cc99896 amdfwtool: Put soc name setting to fw.cfg from command line 
The fw.cfg should combine the SOC name.
This is for future combo feature. Each entry in combo has its own
fw.cfg.
The soc_id in struct cb_config can only be available after the fw.cfg
is processed.
Some functions which take soc_id as a parameter can be simplified.

3/5 (and the key one with same change ID)
of split changes of https://review.coreboot.org/c/coreboot/+/58552/28

Change-Id: Ib0eead1f2156542ea03d58145f5ad67683bf9b52
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-11 12:58:17 +00:00
Matt DeVillier
554c13dc2c util/chromeos/extract_blobs: allow passing dest dir as arg 
Allow user to pass the output dir for the extracted blobs as the 2nd
argument to the script; if not provided, fall back to the existing
default.

Change-Id: I0f120b69e0b6d14c2763b9a3b2a622e77c4fe0d4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2023-02-10 14:53:58 +00:00
Zheng Bao
4bf6f49d12 amdfwtool: Move soc_id to cb_config 
Save the soc_id into a global struct.

Change-Id: I2a0f04a09635086e3076a97b535df8a19d0693ce
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72450
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-10 12:45:00 +00:00
Fred Reitberger
c4f3a33e49 util/amdfwtool: Add UMSMU blob support 
Add PSP blob Type 0xA2 uMsmu support.

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ib38ec03bf20f46774f7438b21d18704cc1ec57fc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ritul guru <ritul.bits@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-02-09 20:43:36 +00:00
Zheng Bao
29063fbd7d amdfwtool: Parse the line with SOC_NAME 
We need to put soc name to fw.cfg for future combo feature.
We skip for now when SOC_NAME is found.

1/5
of split changes https://review.coreboot.org/c/coreboot/+/58552/28

Change-Id: I2b8d7154d22db13675ff57b6abe61c747604c524
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-09 13:45:51 +00:00
Zheng Bao
3d7623ffc9 amdfwtool: Add SOC family definition for Carrizo 
For Carrizo, the soc name was set as UNKNOWN.

The change is supposed to be binary unmodified, except the SPI
settings. According to the spec, the Stoneyridge and Carrizo have the
same definition of SPI setting in EFS.

Change-Id: I9704a44773b2f541f650451ed883a51e2939e12a
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-09 13:44:39 +00:00
Zheng Bao
4e8fb3503c amdfwtool: Allow the location to be a relative address 
When the BIOS size is more than 32M, the physical address of EFS
header will be complicated, like 0xfe020000 or 0xfc020000. So we make
it simpler to allow to use relative address.

This CL works with https://review.coreboot.org/c/coreboot/+/69852

TEST=Result image is binary same on
amd/birman amd/majolica amd/gardina amd/mandolin

Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-09 13:04:08 +00:00
Martin Roth
0363561a30 util/testing: Allow scanbuild test to be skipped 
This is currently killing the jenkins builds.  This patch allows it to
be disabled until the reason is found.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I16dba80a88953aa95f7f647ba12b2ec3297ab81f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
 2023-02-08 19:15:40 +00:00
Zheng Bao
7c7294fa27 amdfwtool: Report the address of EFS header and body 
The address mode is an internal mode which AMD FWs use. Regular
developers don't have to know that. Just report the relative address
every time. For the cases head and body are split, the address of body
is also reported.

Change-Id: I77d9aac0b3d996363341c1d2dae049ec344b39aa
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-08 12:26:37 +00:00
Martin Roth
1b74898395 util/abuild: Add flags to allow abuild to skip boards 
This change adds 2 command line parameters, --skip_set and --skip_unset
that allows abuild to skip boards with particular Kconfig values either
set or not set.

Note that it only works on BOOL type variables.

This can be set on the abuild command line, or the JENKINS_ABUILD_OPT=
variable on the make command line.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I43336484cf25f83065ec7facf45c123d831024b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-02-07 23:33:39 +00:00
Alexander Goncharov
893c3ae892 tree: Drop repeated words 
Found-by: linter
Change-Id: I7c6d0887a45fdb4b6de294770a7fdd5545a9479b
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72795
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-07 04:37:31 +00:00
Martin Roth
0cbc3528e5 util/docker: Add libgpiod-dev to coreboot-sdk for flashrom 
Flashrom needs libgpiod-dev to build the new bitbanging programmer
driver for Linux libgpiod.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I88f7e11fab115487cc44d4b89b3eab4745ad058d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
 2023-02-06 12:44:31 +00:00
Zheng Bao
4044e85938 amdfwtool: Add phoenix and glinda in get_psp_fw_type 
Change-Id: If80cc5396703cef41cc615008c9f0dac0b7bbb09
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
 2023-02-06 12:28:06 +00:00
Zheng Bao
1d7fa216ba amdfwtool: Remove useless printing out 
Change-Id: I819633d8d6d1886b48d53e73923add444ca032e4
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72724
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-05 01:10:46 +00:00
Zheng Bao
7db7642a85 amdfwtool: Add a function to make the calling stack less deep 
And make less levels of indentations in the code.

Change-Id: Ib8cae386eace4f423bde9c252992625e1ff3c690
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-05 01:08:55 +00:00
Martin Roth
4bd2325802 util/scripts/testsoc: Pass arguments to abuild 
This allows the user to pass one or more arguments through the testsoc
script to abuild.

Example:
testsoc -K SOC_AMD_CEZANNE -a "--skip_unset BOARD_GOOGLE_NIPPERKIN"

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic2bc8d656022560ed1eebf6eee0512d3633ebe84
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72766
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-05 00:51:38 +00:00
Felix Held
9f5a5eefc3 util/amdfwtool: add comment about reused PSP firmware type 0x5f 
On family 15h and 16h processors with PSP, the PSP firmware type 0x5f
corresponds to AMD_FW_PSP_SMUSCS, while on family 17h and 19h this
corresponds to AMD_FW_TPMLITE. Add comments to those two enum values to
clarify this.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia5c125ec6a0eb548f58a457f9040278391d2101c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bao Zheng <fishbaozi@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-02-04 03:15:37 +00:00
Arthur Heymans
bc3261f828 util/autoport: Use chipset.cb references 
TESTED with x220 logs.

Change-Id: I89023b6c6dd5d985168331fbb12b2fc36fb65dc3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
 2023-02-04 01:42:43 +00:00
Zheng Bao
85ee1fd571 amdfwtool: Add entry RIB whose subprog equals 1 
For the PHX, it uses subprog 0.
For the PHX2, it uses subprog 1.

Change-Id: Ib013f264fc9940ad95e559fe19bba72c06a19625
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72507
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-02-04 01:42:13 +00:00
Fred Reitberger
abce429dac util/scripts/testsoc: Only select mainboards 
The testsoc script was pulling in odd results when the -K option matched
options in sources, Makefiles, and device trees.  Adding another grep to
limit the list to just Kconfig matches ensures that only actual
mainboards are built.

TEST="./util/testsoc -K PICASSO" no longer tries to build mainboard "0"

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I3860df4520a5594fb9c1a06e75487520b7d5d275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72655
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-03 13:57:07 +00:00
Tarun Tuli
5044dc48f3 util/cbfstool: Add eventLog support for ELOG_TYPE_FW_EARLY_SOL 
In order to support logging events for when we show early signs
of life to the user during CSE FW syncs and MRC trainings add
support for the ELOG_TYPE_FW_EARLY_SOL type.

BUG=b:266113626
TEST=verify event shows in eventlog CSE sync/MRC training

Change-Id: I3913cb8501de9a2605266cf9988a7195576cb91d
Signed-off-by: Tarun Tuli <tarun.tuli@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71296
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
 2023-02-02 21:44:13 +00:00
Zheng Bao
cc132038e2 amdfwtool: Set the level of RIB file as level 2 
It is about AB recovery layout which only has level 2.

Change-Id: I836f11ca0bf5ad37e5093419465244a5c83318cb
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-02-02 13:43:59 +00:00
Patrick Rudolph
ef5ebdb5bb ifdtool: Introduce region_name_fmap 
Instead of directly accessing the region_name array use a helper
function. This allows to move the region name array to a separate
file.

Change-Id: Ifc810da1628cebd2728d0185502c462ff9428597
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
 2023-02-02 13:22:00 +00:00
Patrick Rudolph
1920900baa ifdtool: Add missing chipset_name 
Add denverton soc chipset name.

Change-Id: I0fd8494123490d6ccc21af2ed30c30d50ddb4e8e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68693
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-02 13:21:07 +00:00
Patrick Rudolph
09b136cfe8 ifdtool: Drop chipset without IFD 
Drop unused chipsets that do not use an IFD.

Change-Id: I999e5e5d2063b8d33819fb22296ed486e1194cbb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
 2023-02-02 13:20:19 +00:00
Patrick Rudolph
be25f96c2d ifdtool: Cleanup IFDv1 detection 
Change https://review.coreboot.org/c/coreboot/+/54305 "util/ifdtool:
Use -p platform name to detect IFDv2 platform and chipset" made
the '-p' argument mandatory for IFDv2 platforms.

Drop the IFDv2 platform CHIPSET_C620_SERIES_LEWISBURG from IFDv1
detection.

Change-Id: If29f8718b7aa696cdc07deef4c98be9a68c66f10
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68680
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-02 13:19:36 +00:00
Patrick Rudolph
16598745b8 util/ifdtool: Add Wellsburg support 
Wellsburg is IFDv2 compatible in most fields, but not in all.
It only has 8 regions and the flash master bits match the defines for
IFDv1 and thus has an "IFDv1.5" descriptor.

Add a new enum for IFDv1.5 descriptor and use them to properly operate
on this IFD.

The 'SPI programming guide' is inconsistent and mentions 6 regions
in one place, but 7 regions in another chapter. Tests showed that it
actually supports 7 regions.

Add support using the -p argument to specify Wellsburg platform.

The previous patch made sure that only 8 regions are used and that no
corruption can happen when operating in IFDv2/IFDv1.5 mode.

Tested on Intel Grangeville.

Documents used:
Intel Document Id: 516552
Intel Document Id: 565117

Change-Id: I651730b05deb512478d059174cf8615547d2fde4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Co-developed-by: Julian Elischer <jrelis@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
 2023-02-02 13:19:11 +00:00
Zheng Bao
7c558d0cfa amdfwtool: Remove the duplicated entry RIB 
It should be PSP_RIB_FILE which is already there.

Change-Id: Ie7471489bd34554e357510b04473102d002f9988
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72506
Reviewed-by: ritul guru <ritul.bits@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-02-01 13:44:02 +00:00
Elyes Haouas
b63eb4d172 crossgcc: Upgrade LLVM version 15.0.6 to 15.0.7 
Change-Id: I3198b065316b98f2d26360c4e65055e7460ea707
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-02-01 06:06:36 +00:00
Elyes Haouas
e2cbeebe9f crossgcc: Upgrade CMake from version 3.25.0 to 3.25.2 
Change-Id: Iaf0988997c6644e0e4f02d60a1d6de0e498e19bc
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71889
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-02-01 03:12:03 +00:00
Arthur Heymans
15d5183e4a util/sconfig: Remove lapic devices from devicetree parsers 
This is all handled at runtime now, so there is no need to have the
ability to statically add lapics to the devicetree.

Change-Id: I0746eb808a2956ac75f76c8189a9ecf190e33ce9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69378
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-01-31 15:22:24 +00:00
Elyes Haouas
2c1511a461 crossgcc: Upgrade mpfr from 4.1.1 to 4.2.0 
Changes: https://www.mpfr.org/mpfr-current/#changes

Change-Id: Ife757d7a8247c11338ca795109044cdccdf86733
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-01-31 13:50:18 +00:00
Elyes Haouas
d15a9f9b34 crossgcc: Upgrade mpc from 1.2.1 to 1.3.1 
Change-Id: I2d98c3b4c7edaf3ff097f5739c7cc0cd13592e91
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-01-31 13:48:59 +00:00
Elyes Haouas
8d50e42a51 crossgcc/buildgcc: Add missing "\" at build_NASM 
"\" is missing at the end of CC line for build_NASM.

Change-Id: Ic29ee731def31f958f939efe19bdb55b503eb6ba
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72512
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
 2023-01-31 13:47:30 +00:00
Elyes Haouas
6ac0a46bbf util/crossgcc/buildgcc: Remove extra "/" at the end of IASL_BASE_URL 
Change-Id: I8df1d93a8b0a0d562c7ae5a9f1a70f2eb26499c9
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71976
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-01-30 16:21:27 +00:00
Zheng Bao
dd4c5421d1 amdfwtool: Update and extend PSP header format description 
The comment in the header amdfwtool.c was written long time ago and is
needed to get updated.

Change-Id: I6f64c9a240503f9d0bf240916c1066944fa39d27
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
 2023-01-27 19:52:41 +00:00
Kapil Porwal
0b6954b8d5 elogtool: Fix potential buffer overrun 
BUG=b:239110778
TEST=Make sure that the output of elogtool is unaffected by this change.

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Ia1a6341abd834dd9ad5f12c9f2eefb0489364a08
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72099
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2023-01-27 15:00:20 +00:00
Zheng Bao
92c920b730 amdfwtool: Remove comment "fallthrough" 
Fix the comment as "checkpatch" says.

Change-Id: Ifa5d7de037aa7024779f3aa4a5d2f5033eed264a
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71648
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2023-01-25 14:32:12 +00:00