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74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d
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18 Commits

Author SHA1 Message Date
Elyes HAOUAS
74aa99a543 src: Drop unused '#include <halt.h>' 
Change-Id: Ie7afe77053a21bcf6a1bf314570f897d1791a620
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2019-03-16 11:46:58 +00:00
Julius Werner
cd49cce7b7 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 
This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
 2019-03-08 08:33:24 +00:00
Kyösti Mälkki
13f66507af device/mmio.h: Add include file for MMIO ops 
MMIO operations are arch-agnostic so the include
path should not be arch/.

Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2019-03-04 15:57:39 +00:00
Kyösti Mälkki
f1b58b7835 device/pci: Fix PCI accessor headers 
PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2019-03-01 20:32:15 +00:00
Kyösti Mälkki
5c29daa150 buildsystem: Promote rules.h to default include 
Does not fix 3rdparty/, *.S or *.ld or yet.

Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/17656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
 2019-01-16 11:51:07 +00:00
Elyes HAOUAS
ead574ed02 src: Get rid of duplicated includes 
Change-Id: I252a1cd77bf647477edb7dddadb7e527de872439
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
 2018-11-16 09:50:03 +00:00
Elyes HAOUAS
a342f3937e src: Remove unneeded whitespace 
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
 2018-10-23 15:52:09 +00:00
Bora Guvendik
39363744cc commonlib/storage: Make pci sdhci code compile in romstage 
In romstage malloc is not available, so use CAR_GLOBAL
variable instead.

BUG=b:78106689
TEST=Boot to OS

Change-Id: If9438d0b707c6ffaa61db80bd1d385112bc91cfc
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/25067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
 2018-10-11 10:57:07 +00:00
Nico Huber
d44221f9c8 Move compiler.h to commonlib 
Its spreading copies got out of sync. And as it is not a standard header
but used in commonlib code, it belongs into commonlib. While we are at
it, always include it via GCC's `-include` switch.

Some Windows and BSD quirk handling went into the util copies. We always
guard from redefinitions now to prevent further issues.

Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
 2018-10-08 16:57:27 +00:00
Elyes HAOUAS
0b13397d15 src/{commonlib,lib}: Fix typo 
Change-Id: If7650ac4d9be2614a9665c7f2aba9ac5cc413efe
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
 2018-08-16 18:55:08 +00:00
Elyes HAOUAS
6c9737b1ac src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" 
Change-Id: I8e4118c5c5d70719ad7dc5f9ff9f86d93fa498ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
 2018-07-09 09:26:18 +00:00
Bora Guvendik
e1416fd58f commonlib/storage: Make sd_mmc_go_idle an api 
change sd_mmc_go_idle to be accessible from other files
so that we have an api to send CMD0 and reset the card.

BUG=b:78106689
TEST=Boot to OS

Change-Id: I064a9bded347be5d500047df92d1c448c3392016
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/25066
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2018-07-02 07:26:11 +00:00
Elyes HAOUAS
6ec87da84f src/commonlib/storage: Move include <console.h> to sd_mmc.h 
Non of the .c files is using a function from console.h directly.
Include console.h is moved to sd_mmc.h, where sdhc_error("msg..") is
defined.

Change-Id: Ic9283f227a37785056b9fac216fabcac054066a0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26752
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2018-06-04 02:40:08 +00:00
Aaron Durbin
6403167d29 compiler.h: add __weak macro 
Instead of writing out '__attribute__((weak))' use a shorter form.

Change-Id: If418a1d55052780077febd2d8f2089021f414b91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
 2018-04-24 14:37:59 +00:00
Barnali Sarkar
e962840282 storage: Fix CMD13 failure issue 
This patch stores the correct capabilities for EMMC media which in turn
sets the correct timing data for HS400 mode.

Without this code change, EMMC CMD13 is failing at the end of HS400 mode
switching.

BUG=none
BRANCH=none
TEST=Build and boot Soraka

Change-Id: I3f00c9eace7cc136d86a1e07f040fbfc09e0e02e
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23541
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
 2018-02-07 01:48:24 +00:00
Lee Leahy
f968a4c970 commonlib/storage: Zero extend MMC capacity 
Fix CID 1376472 detected by coverity.  Zero extend the capacity instead
of sign extending it.

TEST=Build and run on reef

Change-Id: I6aac422fb1dacb75e0cc44a94ff1f467ce9f529e
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20392
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2017-06-27 21:55:49 +00:00
Lee Leahy
927f06a565 commonlib/storage: Fix MMC build 
Add missing includes to build mmc.c.

TEST=Build and run on Galileo Gen2

Change-Id: I0dea597272e5ece97843704a159aa546a8d77ff0
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
 2017-06-20 00:12:58 +02:00
Lee Leahy
48dbc663d7 commonlib: Move drivers/storage into commonlib/storage 
Move drivers/storage into commonlib/storage to enable access by
libpayload and indirectly by payloads.

* Remove SD/MMC specific include files from include/device
* Remove files from drivers/storage
* Add SD/MMC specific include files to commonlib/include
* Add files to commonlib/storage
* Fix header file references
* Add subdir entry in commonlib/Makefile.inc to build the SD/MMC driver
* Add Kconfig source for commonlib/storage
* Rename *DEVICE* to *COMMONLIB*
* Rename *DRIVERS_STORAGE* to *COMMONLIB_STORAGE*

TEST=Build and run on Galileo Gen2

Change-Id: I4339e4378491db9a0da1f2dc34e1906a5ba31ad6
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/19672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
 2017-05-12 18:20:33 +02:00