Commit Graph

8 Commits

Author SHA1 Message Date
Michael Niewöhner
97e21d3e95 nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings
There are multiple different devicetree setting formats for graphics
panel settings present in coreboot. Replace the ones for the platforms
that already have (mostly) unified gma/graphics setup code by a unified
struct in the gma driver. Hook it up in HSW, BDW, SKL, and APL and adapt
the devicetrees accordingly.

Always ensure that values don't overflow by applying appropriate masks.

The remaining platforms implementing panel settings (GM45, i945, ILK and
SNB) can be migrated later after unifying their gma/graphics setup code.

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I445defe01d5fbf9a69cf05cf1b5bd6c7c2c1725e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-01-01 21:12:12 +00:00
Michael Niewöhner
44fa0d4ca0 soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation
For easier review of the switch to a new register struct in the
follow-up change, the panel delay times get converted from destination
register raw format to milliseconds representation in this change.

Formula for conversion of power cycle delay:

  gpu_panel_power_cycle_delay_ms =
    (gpu_panel_power_cycle_delay - 1) * 100

Formula for all others:

  gpu_panel_power_X_delay_ms = gpu_panel_power_X_delay / 10

The register names gain a suffix `_ms` and calculation of the
destination register raw values gets done in gma code now.

Change-Id: Idf8e076dac2b3048a63a0109263a6e7899f07230
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48958
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-01 11:25:22 +00:00
Michael Niewöhner
3054a19279 soc/intel/bdw,nb/intel/hsw: correct mask for panel power cycle delay
Correct the mask for the power cycle delay from 0xff to 0x1f, to
represent the actual maximum value according to Intel graphics PRM for
Haswell, Volume 2c and Intel graphics PRM for Broadwell, Volume 2c.

Change-Id: Ib187f1ca6474325475e5ae4cc1b2ffbce12f10bf
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48957
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-29 20:19:52 +00:00
Angel Pons
257b00f357 soc/intel/broadwell/gma.c: Align struct with Haswell
Change-Id: Ifd1fb02497e1d326b6b9c5752f471f52b145a8ef
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-04 22:37:58 +00:00
Angel Pons
9eaca7dcf4 soc/intel/broadwell: Get rid of cpu_is_ult
It is only used in a single file, on two functions that already check
whether coreboot is running on a Haswell or a Broadwell processor.

Change-Id: I86e1061f722e6d6855190c2fd863d85fc24a1ee0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46708
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-30 00:46:29 +00:00
Angel Pons
cb2080f551 soc/intel/broadwell: Drop broadwell_pci_ops
This is essentially a duplicate of `pci_dev_ops_pci`.

Change-Id: I06a21ebd759c35910cd753d3079ea7902868e89d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46697
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-25 16:10:29 +00:00
Angel Pons
14cd17a5fb soc/intel/broadwell/gma.c: Align igd_setup_panel with Haswell
Rename it, add a print and factor out refclock value into a variable.

Change-Id: I7248e0b54cd6310cf74eadc5d976a8868cf822f2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46688
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-24 21:43:31 +00:00
Angel Pons
9bf45b43ee soc/intel/broadwell/igd.c: Rename to gma.c
This makes comparisons against Haswell a bit simpler.

Change-Id: If1c937628f702c6765a5f36b6eaf4a3c3516359a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-10-14 08:36:16 +00:00