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124 Commits

Author SHA1 Message Date
Pat Erley
ca3548e79f This patch adds: 
ICH6 Southbridge,
 82915 Series Northbridge,
 P4 6xx Series CPU

to inteltool

Tested on my Clevo D900T, based on ICH6 and i915P, with a p4 630 
installed.

Signed-off-by: Pat Erley <pat-lkml@erley.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2010-04-21 06:23:19 +00:00
Stefan Reinauer
27852aba67 drop dead code. 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2010-03-21 23:33:36 +00:00
Stefan Reinauer
04844816ac Inteltool: Add i830/Tolapai/Ich4 support 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2010-02-22 11:26:06 +00:00
Loïc Grenié
8429de75a6 Add 82Q35/P35/Q33/G33/G31/P31 support to inteltool. 
The registers are (as far as I can tell) unchanged with respect to those
of the PM965.

Signed-off-by: Loïc Grenié <loic.grenie@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-11-02 15:01:49 +00:00
Uwe Hermann
e23e37202c Hm, quickfix to prevent the following crash, no idea yet what happens: 
*** glibc detected *** ././inteltool: double free or corruption (top): 0x08db0260 ***

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-09-30 17:14:24 +00:00
Maciej Pijanka
90d17407d8 Add initial inteltool support for Intel 440BX/440LX and 82371AB/EB/MB. 
Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-09-30 17:05:46 +00:00
Stefan Reinauer
f7f2f258d8 Clean up Mac OS X support of inteltool 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>

Some minor modifications to allow 64bit/32bit compilation on Darwin



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-09-01 09:52:14 +00:00
Stefan Reinauer
b2aedb1a3f add i810 and ich0 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-08-29 15:45:43 +00:00
Warren Turkal
9702b6bf7e add new supported chipset 
Add identification for X58 and ICH10R.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-06-30 14:11:42 +00:00
Stefan Reinauer
f182456013 mini fix to reliably compile inteltool on darwin, and on Linux both on x86/x86_64. 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2009-04-22 23:17:44 +00:00
Stefan Reinauer
1162f25a49 Patch to util/inteltool: 
* PMBASE dumping now knows the registers.
* Add support for i965, i975, ICH8M
* Add support for Darwin OS using DirectIO

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-12-04 15:18:20 +00:00
Stefan Reinauer
3d9a12f65d inteltool 82945G/GZ/P/PL Support (trivial) 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-11-02 11:11:40 +00:00
Stefan Reinauer
2319027d7e split the one file, as the several printing functions will continue to grow 
immensly when they know more systems / cpus / chipsets

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-08-20 13:41:24 +00:00
Stefan Reinauer
eb02f45e6f use seperate array for core 2 cpus (trivial) 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-08-20 12:42:39 +00:00
Stefan Reinauer
26ba091d51 inteltool: match cpuid before attempting to print MSRs (trivial) 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3514 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-08-18 10:58:09 +00:00
Stefan Reinauer
8b835974cd as per Peter's suggestion. clean binary in make clean 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-06-22 17:15:03 +00:00
Uwe Hermann
710e8b1ad0 Initial support for the Intel 82845 (Brookdale) and ICH2 (trivial). 
Tested on hardware:
Intel Northbridge: 8086:1a30 (i845)
Intel Southbridge: 8086:2440 (ICH2)

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-17 21:33:35 +00:00
Uwe Hermann
9a6b6b51df Cosmetics, whitespace, coding style, partially ident-aided (trivial). 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 21:20:55 +00:00
Stefan Reinauer
f9b99450ce add ICH7-M and ICH7 DH to inteltool (trivial) 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 20:05:00 +00:00
Stefan Reinauer
58a1cc1d34 fix license mentioning in manpage (trivial) 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 14:47:32 +00:00
Stefan Reinauer
9f7af6ef40 trivial patch: move maintainable parts to the top and add ICH7-M DH southbridge 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 14:22:59 +00:00
Stefan Reinauer
d466e6a874 trivial patch to fix options. Thanks to Uwe Hermann for the hint! 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 13:52:50 +00:00
Stefan Reinauer
b69e46bca3 Example on how to add other chipsets to inteltool. ICH/ICH0, ICH4(-M) and ICH7 
have different register meanings, so they get their own lookup tables.

This is a trivial patch.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-14 11:38:22 +00:00
Stefan Reinauer
03646bebbe Add new revised inteltool that dumps all kinds of chipset information and drop old 
gpio_dump utility.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2008-05-13 22:14:21 +00:00