Avoid using deprecated macros, where possible.
"GpioResetPwrGood" represents multiple valid updated values, depending
on the GPIO community and will be more difficult to update.
While Kabylake supports both sets of macros, it will cause build errors
on Coffeelake. In the GPD group, replace with "GpioDswReset."
Replace with "GpioResumeReset" in any GPP group.
Change-Id: Iab0bb09adad997bef3a2133c443471d4c634f423
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Update the information format in the comments above the macros in the
generated gpio.h file:
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD), /* LPSS_UART0_TXD */ -->(i)
/* GPIO_39 - LPSS_UART0_TXD */ --> (ii)
/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii)
/* _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) |
PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), */ --> (iiii)
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD),
Also, in the case of field macros:
/* GPIO_39 - LPSS_UART0_TXD */ --> (ii)
/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii)
/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD), */ --> (iiii)
PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),
By default, if do not use the -i... option, then additional information
in comments will not be generated.
TEST:
git clone https://github.com/maxpoliak/inteltool-examples.git test
./intelp2m -n -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld cb -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld fsp -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld raw -file test/inteltool-asrock-h110m-stx.log
Before and after (now with -i key) the patch, gpio.h is no different.
Change-Id: I760f4aadece786ea455fb7569f42e06fefce2b61
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45168
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add support for Cannonlake-LP SoCs (Whiskeylake-U,
Coffeelake-U, Cometlake-U) as a separate parsing profile,
copying the existing 'Sunrise' profile and adjusting for differences
in reset mapping and GPIO macro generation
Test: convert inteltool GPIO log dump into coreboot macros for
an out-of-tree CML-U board.
Change-Id: I86296697ee892af7aa0818fb608b6d68fad2f307
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>