8 Commits

Author	SHA1	Message	Date
Arthur Heymans	d2ca9d12dc	nb/pineview/raminit: Don't do Jedec init on resume from S3 ... This is not needed. Change-Id: Id19a00c1546b7a71d90aa8c7e43e6efde1e9fbbc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19425 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>	2017-04-26 16:29:12 +02:00
Arthur Heymans	62e784bd8a	nb/intel/pineview: Move to early cbmem ... TESTED on D510MO. Change-Id: I05aa40df0d2a090fcf734416669e9e1bbff094e4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19414 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>	2017-04-24 19:46:43 +02:00
Arthur Heymans	00fd3ff507	nb/pineview/raminit: Fix raminit failing on hot reset path ... For raminit to succeed on a hot reset the following things are prevented from running: * Clearing self refresh * Setting memory frequency * programming sdram dll timings * programming rcomp TESTED on Intel d510mo. Change-Id: I8f7e5c2958df29a96cdf856ade2f4f33707ad362 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19337 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>	2017-04-24 19:45:04 +02:00
Arthur Heymans	097d753980	nb/intel/pineview/raminit: Fix CONFIG_DEBUG_RAM_SETUP=y not compiling ... The function decode_spd uses undeclared variables and an incorrectly initialized array. Change-Id: Ib45a8b2946c04c270e29524675b1f09d491d282b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19336 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>	2017-04-22 08:34:26 +02:00
Elyes HAOUAS	12df950583	northbridge/intel: Add required space before opening parenthesis '(' ... Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16304 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>	2016-08-31 20:30:03 +02:00
Stefan Reinauer	66fbeaec98	intel/pineview: Don't try to store 34 bits in 32 ... Mask out the bit that doesn't fit in 32bits, so gcc 6.1 is happy Change-Id: I13e2b41742206b8d86b90314b80cc324c00ae637 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14639 Reviewed-by: Damien Zammit <damien@zamaudio.com> Tested-by: build bot (Jenkins)	2016-05-08 21:36:32 +02:00
Damien Zammit	51fdb9256a	nb/intel/pineview: Native VGA init (CRT) ... VGA grub console works but display wobbles left/right drm/i915 driver reports one error: - [drm:i915_irq_handler] *ERROR* pipe A underrun - Monitor does not display 1920x1080 after modeset - Other resolutions look out of sync Cause: suspect single bug in raminit (chipset init) Change-Id: I2dcf59f8f30efe98f17a937bf98f5ab7221fc3ac Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12921 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>	2016-01-28 17:53:47 +01:00
Damien Zammit	003d15cab4	northbridge/intel/pineview: Add native raminit ... Does native ram init for Intel Atom D5xx 8086:a000 northbridge Tested on Intel D510MO mainboard, board boots linux kernel - Works fully with both dimms populated (2x2GB), memtest passes 100% - Almost boots with only one dimm in one of the slots (suspect bad memory map with one dimm?) - Reads garbage with only one dimm in other slot Change-Id: Ibd22be2a959045e0a83aae2a3a0e877013f80711 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12501 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>	2015-12-02 00:26:45 +01:00