02b13fd8cd
cpu/intel/model_2065x: Switch to POSTCAR_STAGE
...
Also removes some non-POSTCAR_STAGE functions, since those are unused
now.
Change-Id: I439bffbe39411186355d374eed7d5efd63fb02e3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26792
Reviewed-by: Matthias Gazzari <mail@qtux.eu >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-06-05 07:58:57 +00:00
6fcd7b8eb1
cpu/intel/model_206ax: Switch to POSTCAR_STAGE
...
Tested on Lenovo Thinkpad X220 with both native raminit and mrc.bin.
Change-Id: I5e1a1175d79af4dc079a5a08a464eef08de0bcbf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:53:48 +00:00
c2ccc9782d
cpu/intel/car/non-evict: Improve a few things
...
This improve the following:
- Improve readability for clearing fixed MTRR's
- Compute PHYSMASK high during runtime
- Cache the whole ROM_SIZE instead of XIP_ROM_SIZE
Change-Id: Ifaed96b41fab973fa541de1c4f005d6f0af5254f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:53:38 +00:00
dd4d895136
cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support
...
Prepare a common cache as ram for CPU's featuring a Non eviction mode
MSR.
Change-Id: I7fa3853498856050855b3b97546f4d31f66d12f7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26789
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-06-05 07:49:41 +00:00
3a4edb6ea8
nb/intel/gm45: Switch to POSTCAR_STAGE
...
Change-Id: I02165cf63710bedcafe9287cbe8a1d1fe41ebae2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26788
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-06-05 07:49:30 +00:00
4ff675ebd0
nb/intel/x4x: Switch to POSTCAR_STAGE
...
Change-Id: Ib7f0009bf024d1f09483e0cfc696d234ec78d267
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:49:20 +00:00
aa7cf5597b
nb/intel/pineview: Switch to POSTCAR_STAGE
...
Change-Id: If23925e2837645c974e4094e7e2d90e700d3d9e8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:49:09 +00:00
2dcc3a5c68
nb/intel/i945: Switch to POSTCAR_STAGE
...
Change-Id: Ibbe6aa55a4efe4a2675c757ba2ab2b56055c60ac
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:48:58 +00:00
3aa9adba67
cpu/intel/car/core2: Improve a few things
...
This changes the following:
- compute amount variable MTRR's during runtime
- Wait for all CPU's to be in Wait for SIPI state after sending init
INIT IPI to all AP's
- compute the PHYSMASK high during runtime and preload it to the
MTRR_PHYS_MASK msr's
Change-Id: I8d8672f8b577c2e7cef6e80978c4464a771f430c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:48:46 +00:00
7a8205ba35
cpu/intel/car/core2: Prepare for POSTCAR_STAGE support
...
Split of the model_6ex cache as ram to support POSTCAR_STAGE, which is
also needed for future C_ENVIRONMENT_BOOTBLOCK.
When using POSTCAR_STAGE the p4-netburst/exit_car.S is using since it
is identical.
Change-Id: Ibe9f065fdf1d702b73333ea7bb32daca15ba1293
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/26783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-06-05 07:48:12 +00:00
711fb811ac
soc/intel/skylake: Swap PCI devfn resides in same PCI device
...
After FSP-S, a device on PCI function n will be function swapped
to function 0 if there is no device presnet on function 0.
It needs some modification for DT and causes mismatches between
software configuration and hardware schematic. This patch is
from d779605gaggery.tsai@intel.com >
Reviewed-on: https://review.coreboot.org/26479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Furquan Shaikh <furquan@google.com >
2018-06-05 02:29:39 +00:00
c07f8fbe6f
security/tpm: Unify the coreboot TPM software stack
...
* Remove 2nd software stack in pc80 drivers directory.
* Create TSPI interface for common usage.
* Refactor TSS / TIS code base.
* Add vendor tss (Cr50) directory.
* Change kconfig options for TPM to TPM1.
* Add user / board configuration with:
* MAINBOARD_HAS_*_TPM # * BUS driver
* MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2
* Add kconfig TPM user selection (e.g. pluggable TPMs)
* Fix existing headers and function calls.
* Fix vboot for interface usage and antirollback mode.
Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org >
Reviewed-on: https://review.coreboot.org/24903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2018-06-04 20:33:07 +00:00
961d31bdb3
intel/i440bx: Drop tests for LATE_CBMEM_INIT
...
Change-Id: I08c28862cc66956bdcab6ac9362b3d50bb64e78f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-06-04 12:48:54 +00:00
e0e1e64855
amdfam10: Drop tests for LATE_CBMEM_INIT
...
Change-Id: Ibe16242d98531ff8e8a696f571496c6f46ea964b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-06-04 12:48:22 +00:00
56dd2d26b5
soc/dmp: Drop leftover file
...
Change-Id: I6994b48b48fb7177b9ae32825dcd9af099b85410
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-06-04 12:47:44 +00:00
89011bec6a
Documentation: Remove whitespace before tab
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Change-Id: I8cb5b122162c40435f93019c9be9a367d2656cf1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26660
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-06-04 11:48:23 +00:00
1e96ea1a09
mb/lenovo/t430/devicetree: Add missing TPM entry
...
Tested on Lenovo T430:
The TPM is advertised through ACPI tables and the version can be
read using tpm_version, tcsd and tpm_tis.
Change-Id: I0b0c39e7aa1be4a479325d4b5eff5892a7e2f69f
Signed-off-by: Patrick Rudolph <siro@das-labor.org >
Reviewed-on: https://review.coreboot.org/26780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
2018-06-04 11:10:24 +00:00
d5f91e41c3
util/ifdtool: Remove .dependencies on make clean
...
The generated file .dependencies shall be removed on invocation of
'make clean' as the clean target aims to delete all generated files.
Change-Id: I4ec291fe84136bbdf1c2563cc10195846652a36d
Signed-off-by: Werner Zeh <werner.zeh@siemens.com >
Reviewed-on: https://review.coreboot.org/26600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:38:25 +00:00
3664647a25
sb/intel/i82801gx: Add the option to lock the platform
...
This allows to lock down spi among other things
Mostly copied from bd82x6x.
Tested on Intel DG41WV with the MRC_CACHE driver write protecting the
mrc_cache region.
Change-Id: If9c3a6118f4586d51c093edec896c347ba904b8f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/23358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:35:58 +00:00
02c997122f
src/sb/intel/common/spi.c: Adapt and link in romstage
...
Based on Nicola Corna's work.
This allows for CONFIG_CONSOLE_SPI_FLASH to be used, which writes the
console output to the SPI flash.
TESTED to still work in ramstage on x220 (correctly writes MRC CACHE),
the option CONFIG_CONSOLE_SPI_FLASH compiles for targets using the
common Intel SPI code (untested though).
Change-Id: I4671653c0b07ab5c4bf91128f18f142ce4f893cf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz >
Reviewed-on: https://review.coreboot.org/25414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:35:54 +00:00
93ffe83ec2
Documentation: Add markdown license information
...
Add CC-by 4.0 license written in markdown and add global copyright string.
Change-Id: I31dc540d63b289d38d6d7d9a7c35b6bb50f9c92d
Signed-off-by: Patrick Rudolph <siro@das-labor.org >
Reviewed-on: https://review.coreboot.org/26264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Martin Roth <martinroth@google.com >
2018-06-04 09:31:34 +00:00
c724ac1f3c
board_status: Abort if repository is in a dirty state
...
Run `git status` to let the user spot what is going on.
Change-Id: I154d964354872f922cd22b05a5d2231ca2504f25
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net >
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de >
Reviewed-on: https://review.coreboot.org/22016
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-06-04 09:25:17 +00:00
d5b9ce926c
soc/broadcom/cygnus: Get rid of device_t
...
Use of device_t has been abandoned in ramstage.
Change-Id: Id41279a1cdc7c68d3dcc44e238863f2f4a452499
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:21:04 +00:00
05498a254d
src/soc: Get rid of whitespace before tab
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Change-Id: Ia024fb418f02d90c38b9a35ff819c607b9ac4965
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:20:52 +00:00
e7f4beca19
soc/imgtec/pistachio: Get rid of device_t
...
Use of device_t has been abandoned in ramstage.
Change-Id: Ia36b4ef7d66c50a044bc51f452ac8b7c7ff14323
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:18:19 +00:00
f9ae706521
soc/marvell/mvmap2315: Get rid of device_t
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Use of device_t has been abandoned in ramstage.
Change-Id: I6db25850d46ea3a940ea2a6f263303d4b5304cb3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:18:05 +00:00
b44266996b
soc/mediatek/mt8173: Get rid of device_t
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Use of device_t has been abandoned in ramstage.
Change-Id: Ifadb894f98ce60cf0778de7fbcec67d125e48fd6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:17:52 +00:00
0111533416
soc/samsung: Get rid of device_t
...
Use of device_t has been abandoned in ramstage.
Change-Id: Ibf21100eb2232932ea52740bd5250319d3c9adfa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:17:35 +00:00
f3ca88b7ed
soc/rockchip: Get rid of device_t
...
Use of device_t has been abandoned in ramstage.
Change-Id: Idf47ea3b29c3fab7256d7a6722c7978594001d8d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:17:18 +00:00
610d46506e
src/ec: Remove whitespace before tab
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Change-Id: Ib47cc1ee617aae74a8cfbcb25c1d0c083196f417
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:15:51 +00:00
012e7a4ebd
libpayload/curses/{form,menu}: Fix uncountable "information"
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Change-Id: I28c79d0262a54b58d353802e0d572e5b8be5fbc5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:14:48 +00:00
1f4b5eff37
mainboard/amd/inagua: Fix a typo in comment
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Change-Id: I5ace69f9a624da9556a14c498a592305a3b1c89f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:13:42 +00:00
5e0a2c2da4
mb/samsung: Get rid of whitespace before tab
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Change-Id: I0aefe25e3af61c747c06629e365b8e27459181aa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:13:27 +00:00
9d75957116
src/cpu: Get rid of whitespace before tab
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Change-Id: Ic501f5f9e8cd79774eb2a8d8902f01853d746470
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:13:11 +00:00
0d8f1dac9e
src/drivers: Get rid of whitespace before tab
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Change-Id: Ia9ca055679c0332613afb2bb2ed86df165de3baf
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:12:44 +00:00
5bd5a9ae01
src/superio/{ite,smsc}: Remove space before tab
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Change-Id: I2829e4cb1445f8412f57da10fda6b92c92e56ea0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26650
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:11:32 +00:00
b9585c5cc8
util/superiotool: Remove whitespace before tab
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Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:10:32 +00:00
5bc61dafd1
util/cbfstool: Remove whitespace before tab
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Change-Id: I122acaf9129afaa7b3ae8fd50d8717138809132e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:10:05 +00:00
1d446349ae
mb/msi: Get rid of whitespace before tab
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Change-Id: I9d35bc706b0daac1e234441c86286cb2957f89ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:09:08 +00:00
39b4707fec
mb/winent: Get rid of whitespace before tab
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Change-Id: Ib06f771b6b50f2ad1af440c8019e8cca38d2a4f0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26641
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:08:30 +00:00
37ca75117a
mb/via: Get rid of whitespace before tab
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Change-Id: I490091e7dec5a46040e8ba7cd5cd6c244b017e30
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:08:12 +00:00
4c2ec08bf7
mb/supermicro: Get rid of whitespace before tab
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Change-Id: Id2622e473959dcf105bfeeaebddd582593a3c274
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26637
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:07:55 +00:00
885749db2d
mb/siemens: Get rid of whitespace before tab
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Change-Id: Ic334f65e5c27d4f773f81fc1c9e3df7d63d47a11
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:07:20 +00:00
846a43eb6b
mb/lippert: Get rid of whitespace before tab
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Change-Id: I52fe5a67e6b914426943c3499904e0546c3ea623
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26631
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:05:05 +00:00
58b9eeca32
mb/lenovo: Get rid of whitespace before tab
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Change-Id: I958fe66655cc3c589ce6709b83c56a9472628324
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:04:26 +00:00
ca3405ff32
mb/kontron: Get rid of whitespace before tab
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Change-Id: I335dda11d0c1ee58bd2728580c48c41cef574654
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26629
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:04:00 +00:00
fe67951fa7
mb/jetway: Get rid of whitespace before tab
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Change-Id: Icc7d7fee38e41f4bfda685fd42bf504a788b440c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:03:43 +00:00
cd5f2b500d
mb/intel: Get rid of whitespace before tab
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Change-Id: I891b056b64fde27ef0e351f8cf24a258fb5cabfa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:03:18 +00:00
60d7348a36
mb/iei: Get rid of whitespace before tab
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Change-Id: I750ec788b7526ee2a7aa803bffb93805cedfb2ff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:02:34 +00:00
c0dbd65d0c
mb/ibase: Get rid of whitespace before tab
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Change-Id: I8e21843e11498438e115f1f82f94f2944ae7a3c8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:02:08 +00:00
