Patrick Rudolph
c4d56d668f
Documentation: Advertise support for OpenSBI
...
Change-Id: Ie990bb95fcdcfab0246e8c694704022d9b8b5195
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-by: Philipp Hug <philipp@hug.cx >
Reviewed-by: Xiang Wang <merle@hardenedlinux.org >
2019-08-06 12:04:01 +00:00
Philipp Hug
6b6dc6eddd
hifive-unleashed: update documentation to match current state
...
Signed-off-by: Philipp Hug <philipp@hug.cx >
Change-Id: I3f1b7dd4ef52a64c9a222f2d5cffe2b73806fe4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com >
2019-04-23 09:34:09 +00:00
Jonathan Neuschäfer
fd29ff3555
Documentation/mb/sifive: Fix dead links
...
SiFive's website was reorganized, which broke our links to PDF files.
Update these links to the current ones, obtained by browsing
https://sifive.com/documentation/ .
Change-Id: I312de84bf12abb0789bdd971c40033f1e4ea0dd1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-on: https://review.coreboot.org/28952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com >
2018-10-06 21:32:11 +00:00
Philipp Hug
2326a284ac
riscv: add trampoline in MBR block to support boot mode 1
...
Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock.
Tested on hardware:
boot mode 15: works as before
boot mode 1: jump to bootblock works, but bootblock needs to be modified to
move the stack to L2LIM. This will be in a separate commit.
Further changes are needed in the bootblock
Change-Id: I16e762d9f027346b124412f1f7ee6ff37f431d86
Signed-off-by: Philipp Hug <philipp@hug.cx >
Reviewed-on: https://review.coreboot.org/27397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
2018-09-14 14:33:09 +00:00
Philipp Hug
ea81928e94
soc/sifive/fu540: Add driver for OTP memory
...
Provides minimal functionality to read the SOC s/n from the NeoFuse
one time programmable memory.
Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0
Signed-off-by: Philipp Hug <philipp@hug.cx >
Reviewed-on: https://review.coreboot.org/27435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
2018-09-10 15:05:11 +00:00
Jonathan Neuschäfer
e73e81d029
Documentation/mb/sifive: Update TODO list; UART driver has been merged
...
See 894e3a9ec8j.neuschaefer@gmx.net >
Reviewed-on: https://review.coreboot.org/27398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com >
2018-07-17 11:53:32 +00:00
Jonathan Neuschäfer
7a11c900b6
Documentation: Add HiFive Unleashed documentation
...
Change-Id: Ic97955e36feeaa18b5a0dbd502c722c06dcc1b31
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-on: https://review.coreboot.org/25792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com >
2018-05-08 03:07:36 +00:00
