Michael Niewöhner
10d522133e
util/inteltool: use read* macros instead of pointers
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Switch to using read* macros instead of pointers.
Change-Id: I1fe54b496a5998597b79cdd7108f3a4075744a78
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2020-03-21 22:12:10 +00:00
Michael Niewöhner
fe8170f909
util/inteltool: ahci: add Sunrise Point config and SIR registers
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This adds the Sunrise Point AHCI config and SIR registers from
doc#332691-003EN.
Change-Id: Id4a462d625194a6ccfdb88fb415d5eb278f2900a
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39506
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2020-03-16 22:41:33 +00:00
Michael Niewöhner
e6cff0d830
util/inteltool: ahci: add code for dumping config and SIR registers
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This adds the code required to dump config and SIR registers.
Change-Id: I3726c52d415ff4dd6b19513b310f11254f7fbf92
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39560
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2020-03-16 22:41:07 +00:00
Michael Niewöhner
8676c268a0
util/inteltool: ahci: rework AHCI
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Rework AHCI to align the code with the rest of inteltool.
Change-Id: I37116f8e269d0376e147dd6de7365c45ac90bda0
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39504
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2020-03-16 22:38:31 +00:00
Matthew Garrett
2bf28e52ee
util/inteltool: Add support for Sunrise Point LP
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Used documents:
334658 (Sunrise Point-LP I/O datasheet vol. 1)
334659 (Sunrise Point-LP I/O datasheet vol. 2)
332690 (Sunrise Point I/O datasheet vol. 1)
Change-Id: I16237ffc9a225b46271f2a51d77a7f28dfc36138
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de >
Reviewed-on: https://review.coreboot.org/c/28623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
2018-12-28 22:31:54 +00:00
Nico Huber
c272a87f5c
inteltool/ahci: Don't print reserved, all-zero registers
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Behavior matches with other dumps of inteltool.
Change-Id: Id9755d251fc42185c9e8d574deb55c76e129b718
Signed-off-by: Nico Huber <nico.huber@secunet.com >
Reviewed-on: https://review.coreboot.org/19585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org >
2017-06-06 17:34:57 +02:00
Nico Huber
da94e171b5
inteltool/ahci: Add Skylake support
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The SATA device moved from 0:1f.2 to 0:17.0, 0:1f.2 became PMC. We
detect that by checking the PCI device class.
The ABAR MMIO space has grown to 2KiB and up to 8 ports are supported
now. For backwards compatibility, only dump port registers of ports
that are enabled in the Ports Implemented (PI) register.
Change-Id: I8e0f07d7359d92f689882b5afefa5ffb3766ee8b
Signed-off-by: Nico Huber <nico.huber@secunet.com >
Reviewed-on: https://review.coreboot.org/19584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org >
2017-06-06 17:27:10 +02:00
Iru Cai
904538bcc1
inteltool: add --ahci for printing AHCI registers
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According to datasheets for Intel ICH/PCH, it works for chipsets from
ICH7 to 9-series PCH, with PCI device address D31:F2.
Change-Id: If1ddd7208108bda949b5a94894a7bf9e8bfe1e5f
Signed-off-by: Iru Cai <mytbk920423@gmail.com >
Reviewed-on: https://review.coreboot.org/15106
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2016-09-21 14:16:55 +02:00
