Update blobs

payloads/external/tianocore/Makefile

@@ -18,8 +18,8 @@ export SHELL := env bash
 
 project_name=Tianocore
 project_dir=$(CURDIR)/tianocore
-project_git_repo=https://github.com/mrchromebox/edk2
+project_git_repo=https://github.com/system76/edk2
-project_git_branch=coreboot_fb
+project_git_branch=system76
 upstream_git_repo=https://github.com/tianocore/edk2
 
 # STABLE revision is MrChromebox's coreboot framebuffer (coreboot_fb) branch

rebuild.sh

@@ -3,6 +3,10 @@
 set -ex
 
 MODEL="$(grep CONFIG_VARIANT_DIR .config | cut -d '"' -f2)"
+if [ -z "$MODEL" ]
+then
+    MODEL="qemu"
+fi
 
 time make -j$(nproc) BUILD_TIMELESS=1
 

src/mainboard/system76/kbl-u/Kconfig

@@ -5,10 +5,12 @@ config BOARD_SPECIFIC_OPTIONS
 	select ADD_FSP_BINARIES
 	select BOARD_ROMSIZE_KB_8192
 	select EC_ACPI
+	select EXCLUDE_EMMC_INTERFACE
 	select FSP_USE_REPO
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
-#	select HAVE_CMOS_DEFAULT
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
 	select HAVE_SMI_HANDLER
 	select INTEL_GMA_HAVE_VBT
 	select MAINBOARD_HAS_LPC_TPM
@@ -20,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select SPD_READ_BY_WORD
 	select SYSTEM_TYPE_LAPTOP
 	select USE_BLOBS
+	select USE_OPTION_TABLE
 
 config MAINBOARD_DIR
 	string

src/mainboard/system76/kbl-u/acpi/ec.asl

@@ -36,18 +36,23 @@ Device (EC)
     #include "acpi/ec_ram.asl"
 
     Name (ECOK, Zero)
-    Method (_REG, 2, NotSerialized)  // _REG: Region Availability
+    Method (_REG, 2, Serialized)  // _REG: Region Availability
     {
         Store ("EC: _REG", Debug)
-        If (((Arg0 == 0x03) && (Arg1 == One)))
+        If (((Arg0 == 0x03) && (Arg1 == One))) {
-        {
+            // Enable software touchpad lock and airplane mode keys
-            ECOK = Arg1
+            ECOS = 2
-            ECOS = One
-            WINF = One
 
+            // Enable software backlight keys
+            WINF = 1
+
+            // Set current AC state
             ^^^^AC.ACFG = ADP
 
             PNOT ()
+
+            // EC is now available
+            ECOK = Arg1
         }
     }
 
@@ -163,8 +168,15 @@ Device (EC)
         Notify (PWRB, 0x80)
     }
 
-    Method (_Q50, 0, NotSerialized) // TODO
+    Method (_Q50, 0, NotSerialized) // Other Events
     {
-        Store ("EC: 50", Debug)
+        Local0 = OEM4
+        If (Local0 == 0x8A) { // White Keyboard Backlight
+            Store ("EC: White Keyboard Backlight", Debug)
+            Notify (^^^^S76D, 0x80)
+        } Else {
+            Store ("EC: Other", Debug)
+            Store (Local0, Debug)
+        }
     }
 }

src/mainboard/system76/kbl-u/acpi/lid.asl

@@ -22,7 +22,7 @@ Device (LID0)
     {
         If (^^PCI0.LPCB.EC.ECOK)
         {
-            Return (\_SB.PCI0.LPCB.EC.LSTE)
+            Return (^^PCI0.LPCB.EC.LSTE)
         }
         Else
         {

src/mainboard/system76/kbl-u/acpi/mainboard.asl

@@ -20,4 +20,5 @@ Scope (\_SB)
     #include "buttons.asl"
     #include "hid.asl"
     #include "lid.asl"
+    #include "s76.asl"
 }

src/mainboard/system76/kbl-u/acpi/s76.asl

@@ -0,0 +1,61 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 System76
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Device (S76D) {
+    Name (_HID, "17761776")
+    Name (_UID, 0)
+
+    // Get Airplane LED
+    Method (GAPL, 0, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            If (^^PCI0.LPCB.EC.AIRP & 0x40) {
+                Return (1)
+            }
+        }
+        Return (0)
+    }
+
+    // Set Airplane LED
+    Method (SAPL, 1, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            If (Arg0) {
+                ^^PCI0.LPCB.EC.AIRP |= 0x40
+            } Else {
+                ^^PCI0.LPCB.EC.AIRP &= 0xBF
+            }
+        }
+    }
+
+    // Get KB LED
+    Method (GKBL, 0, Serialized) {
+        Local0 = 0
+        If (^^PCI0.LPCB.EC.ECOK) {
+            ^^PCI0.LPCB.EC.FDAT = One
+            ^^PCI0.LPCB.EC.FCMD = 0xCA
+            Local0 = ^^PCI0.LPCB.EC.FBUF
+            ^^PCI0.LPCB.EC.FCMD = Zero
+        }
+        Return (Local0)
+    }
+
+    // Set KB Led
+    Method (SKBL, 1, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            ^^PCI0.LPCB.EC.FDAT = Zero
+            ^^PCI0.LPCB.EC.FBUF = Arg0
+            ^^PCI0.LPCB.EC.FCMD = 0xCA
+        }
+    }
+}

src/mainboard/system76/kbl-u/cmos.default

@@ -0,0 +1 @@
+DisplayPort_Output=Mini_DisplayPort

src/mainboard/system76/kbl-u/cmos.layout

@@ -0,0 +1,33 @@
+#*****************************************************************************
+#
+#  This file is part of the coreboot project.
+#
+#  Copyright (C) 2019 System76
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#*****************************************************************************
+
+entries
+
+#start  length  type    id      name
+0       384     r       0       reserved_memory
+384     1       e       1       DisplayPort_Output
+984     16      h       0       check_sum
+
+enumerations
+
+#ID     value   text
+1       0       Mini_DisplayPort
+1       1       USB-C
+
+checksums
+
+#checksum   start   end     location
+checksum    384     983     984

src/mainboard/system76/kbl-u/ramstage.c

@@ -14,6 +14,7 @@
  */
 
 #include <device/device.h>
+#include <option.h>
 #include <pc80/keyboard.h>
 #include <soc/ramstage.h>
 #include "gpio.h"
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) {
 
 static void mainboard_enable(struct device *dev) {
 	pc_keyboard_init(NO_AUX_DEVICE);
+
+	uint32_t config = 0x44000200;
+
+	uint8_t nvram = 0;
+	if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
+		if (nvram) {
+			config |= 1;
+		}
+	}
+
+	struct pad_config displayport_gpio_table[] = {
+		/* PS8338B_SW */
+		_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
+	};
+	gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/system76/whl-u/Kconfig

@@ -9,7 +9,8 @@ config BOARD_SPECIFIC_OPTIONS
 	select FSP_USE_REPO
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
-#	select HAVE_CMOS_DEFAULT
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
 	select HAVE_SMI_HANDLER
 	select INTEL_GMA_HAVE_VBT
 #	select MAINBOARD_HAS_SPI_TPM_CR50
@@ -17,8 +18,10 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_HDA
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
 	select SOC_INTEL_WHISKEYLAKE
+	select SPD_READ_BY_WORD
 	select SYSTEM_TYPE_LAPTOP
 	select USE_BLOBS
+	select USE_OPTION_TABLE
 
 config MAINBOARD_DIR
 	string

src/mainboard/system76/whl-u/acpi/ec.asl

@@ -36,18 +36,23 @@ Device (EC)
     #include "acpi/ec_ram.asl"
 
     Name (ECOK, Zero)
-    Method (_REG, 2, NotSerialized)  // _REG: Region Availability
+    Method (_REG, 2, Serialized)  // _REG: Region Availability
     {
         Store ("EC: _REG", Debug)
-        If (((Arg0 == 0x03) && (Arg1 == One)))
+        If (((Arg0 == 0x03) && (Arg1 == One))) {
-        {
+            // Enable software touchpad lock and airplane mode keys
-            ECOK = Arg1
+            ECOS = 2
-            ECOS = One
-            WINF = One
 
+            // Enable software backlight keys
+            WINF = 1
+
+            // Set current AC state
             ^^^^AC.ACFG = ADP
 
             PNOT ()
+
+            // EC is now available
+            ECOK = Arg1
         }
     }
 
@@ -163,8 +168,15 @@ Device (EC)
         Notify (PWRB, 0x80)
     }
 
-    Method (_Q50, 0, NotSerialized) // TODO
+    Method (_Q50, 0, NotSerialized) // Other Events
     {
-        Store ("EC: 50", Debug)
+        Local0 = OEM4
+        If (Local0 == 0x8A) { // White Keyboard Backlight
+            Store ("EC: White Keyboard Backlight", Debug)
+            Notify (^^^^S76D, 0x80)
+        } Else {
+            Store ("EC: Other", Debug)
+            Store (Local0, Debug)
+        }
     }
 }

src/mainboard/system76/whl-u/acpi/lid.asl

@@ -22,7 +22,7 @@ Device (LID0)
     {
         If (^^PCI0.LPCB.EC.ECOK)
         {
-            Return (\_SB.PCI0.LPCB.EC.LSTE)
+            Return (^^PCI0.LPCB.EC.LSTE)
         }
         Else
         {

src/mainboard/system76/whl-u/acpi/mainboard.asl

@@ -20,4 +20,5 @@ Scope (\_SB)
     #include "buttons.asl"
     #include "hid.asl"
     #include "lid.asl"
+    #include "s76.asl"
 }

src/mainboard/system76/whl-u/acpi/s76.asl

@@ -0,0 +1,61 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 System76
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Device (S76D) {
+    Name (_HID, "17761776")
+    Name (_UID, 0)
+
+    // Get Airplane LED
+    Method (GAPL, 0, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            If (^^PCI0.LPCB.EC.AIRP & 0x40) {
+                Return (1)
+            }
+        }
+        Return (0)
+    }
+
+    // Set Airplane LED
+    Method (SAPL, 1, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            If (Arg0) {
+                ^^PCI0.LPCB.EC.AIRP |= 0x40
+            } Else {
+                ^^PCI0.LPCB.EC.AIRP &= 0xBF
+            }
+        }
+    }
+
+    // Get KB LED
+    Method (GKBL, 0, Serialized) {
+        Local0 = 0
+        If (^^PCI0.LPCB.EC.ECOK) {
+            ^^PCI0.LPCB.EC.FDAT = One
+            ^^PCI0.LPCB.EC.FCMD = 0xCA
+            Local0 = ^^PCI0.LPCB.EC.FBUF
+            ^^PCI0.LPCB.EC.FCMD = Zero
+        }
+        Return (Local0)
+    }
+
+    // Set KB Led
+    Method (SKBL, 1, Serialized) {
+        If (^^PCI0.LPCB.EC.ECOK) {
+            ^^PCI0.LPCB.EC.FDAT = Zero
+            ^^PCI0.LPCB.EC.FBUF = Arg0
+            ^^PCI0.LPCB.EC.FCMD = 0xCA
+        }
+    }
+}

src/mainboard/system76/whl-u/cmos.default

@@ -0,0 +1 @@
+DisplayPort_Output=Mini_DisplayPort

src/mainboard/system76/whl-u/cmos.layout

@@ -0,0 +1,33 @@
+#*****************************************************************************
+#
+#  This file is part of the coreboot project.
+#
+#  Copyright (C) 2019 System76
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#*****************************************************************************
+
+entries
+
+#start  length  type    id      name
+0       384     r       0       reserved_memory
+384     1       e       1       DisplayPort_Output
+984     16      h       0       check_sum
+
+enumerations
+
+#ID     value   text
+1       0       Mini_DisplayPort
+1       1       USB-C
+
+checksums
+
+#checksum   start   end     location
+checksum    384     983     984

src/mainboard/system76/whl-u/ramstage.c

@@ -14,6 +14,7 @@
  */
 
 #include <device/device.h>
+#include <option.h>
 #include <pc80/keyboard.h>
 #include <soc/ramstage.h>
 #include "gpio.h"
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
 
 static void mainboard_enable(struct device *dev) {
 	pc_keyboard_init(NO_AUX_DEVICE);
+
+	uint32_t config = 0x44000200;
+
+	uint8_t nvram = 0;
+	if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
+		if (nvram) {
+			config |= 1;
+		}
+	}
+
+	struct pad_config displayport_gpio_table[] = {
+		/* PS8338B_SW */
+		_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
+	};
+	gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
 }
 
 struct chip_operations mainboard_ops = {

system76/darp5/config

@@ -15,6 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -502,6 +504,8 @@ CONFIG_EARLY_EBDA_INIT=y
 CONFIG_PC80_SYSTEM=y
 # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
 # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
 # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
 # CONFIG_HPET_ADDRESS_OVERRIDE is not set
@@ -715,7 +719,7 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
 CONFIG_HAVE_MONOTONIC_TIMER=y
 # CONFIG_GENERIC_UDELAY is not set
 # CONFIG_TIMER_QUEUE is not set
-# CONFIG_HAVE_OPTION_TABLE is not set
+CONFIG_HAVE_OPTION_TABLE=y
 # CONFIG_PIRQ_ROUTE is not set
 CONFIG_HAVE_SMI_HANDLER=y
 # CONFIG_PCI_IO_CFG_EXT is not set
@@ -822,4 +826,5 @@ CONFIG_REG_SCRIPT=y
 # CONFIG_EARLY_CBMEM_LIST is not set
 CONFIG_RELOCATABLE_MODULES=y
 CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_SPD_READ_BY_WORD=y
 CONFIG_C_ENVIRONMENT_BOOTBLOCK=y

system76/galp2/config

@@ -15,6 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -517,6 +519,8 @@ CONFIG_EARLY_EBDA_INIT=y
 CONFIG_PC80_SYSTEM=y
 # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
 # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
 # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
 # CONFIG_HPET_ADDRESS_OVERRIDE is not set
@@ -723,7 +727,7 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
 CONFIG_HAVE_MONOTONIC_TIMER=y
 # CONFIG_GENERIC_UDELAY is not set
 # CONFIG_TIMER_QUEUE is not set
-# CONFIG_HAVE_OPTION_TABLE is not set
+CONFIG_HAVE_OPTION_TABLE=y
 # CONFIG_PIRQ_ROUTE is not set
 CONFIG_HAVE_SMI_HANDLER=y
 # CONFIG_PCI_IO_CFG_EXT is not set

system76/galp3-b/config

@@ -15,6 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -517,6 +519,8 @@ CONFIG_EARLY_EBDA_INIT=y
 CONFIG_PC80_SYSTEM=y
 # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
 # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
 # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
 # CONFIG_HPET_ADDRESS_OVERRIDE is not set
@@ -723,7 +727,7 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
 CONFIG_HAVE_MONOTONIC_TIMER=y
 # CONFIG_GENERIC_UDELAY is not set
 # CONFIG_TIMER_QUEUE is not set
-# CONFIG_HAVE_OPTION_TABLE is not set
+CONFIG_HAVE_OPTION_TABLE=y
 # CONFIG_PIRQ_ROUTE is not set
 CONFIG_HAVE_SMI_HANDLER=y
 # CONFIG_PCI_IO_CFG_EXT is not set

system76/galp3-c/config

@@ -15,6 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -502,6 +504,8 @@ CONFIG_EARLY_EBDA_INIT=y
 CONFIG_PC80_SYSTEM=y
 # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
 # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
 # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
 # CONFIG_HPET_ADDRESS_OVERRIDE is not set
@@ -715,7 +719,7 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
 CONFIG_HAVE_MONOTONIC_TIMER=y
 # CONFIG_GENERIC_UDELAY is not set
 # CONFIG_TIMER_QUEUE is not set
-# CONFIG_HAVE_OPTION_TABLE is not set
+CONFIG_HAVE_OPTION_TABLE=y
 # CONFIG_PIRQ_ROUTE is not set
 CONFIG_HAVE_SMI_HANDLER=y
 # CONFIG_PCI_IO_CFG_EXT is not set
@@ -822,4 +826,5 @@ CONFIG_REG_SCRIPT=y
 # CONFIG_EARLY_CBMEM_LIST is not set
 CONFIG_RELOCATABLE_MODULES=y
 CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_SPD_READ_BY_WORD=y
 CONFIG_C_ENVIRONMENT_BOOTBLOCK=y

system76/galp3/config

@@ -15,6 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -517,6 +519,8 @@ CONFIG_EARLY_EBDA_INIT=y
 CONFIG_PC80_SYSTEM=y
 # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
 # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
 # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
 # CONFIG_HPET_ADDRESS_OVERRIDE is not set
@@ -723,7 +727,7 @@ CONFIG_RESUME_PATH_SAME_AS_BOOT=y
 CONFIG_HAVE_MONOTONIC_TIMER=y
 # CONFIG_GENERIC_UDELAY is not set
 # CONFIG_TIMER_QUEUE is not set
-# CONFIG_HAVE_OPTION_TABLE is not set
+CONFIG_HAVE_OPTION_TABLE=y
 # CONFIG_PIRQ_ROUTE is not set
 CONFIG_HAVE_SMI_HANDLER=y
 # CONFIG_PCI_IO_CFG_EXT is not set

system76/qemu/config

@@ -15,7 +15,8 @@ CONFIG_COMPILER_GCC=y
 CONFIG_CCACHE=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_STATIC_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
@@ -89,7 +90,6 @@ CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 q35/ich9"
 CONFIG_MAX_CPUS=1
 CONFIG_CBFS_SIZE=0x800000
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_PAYLOAD_CONFIGFILE=""
 CONFIG_MAINBOARD_VENDOR="Emulation"
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_DIMM_SPD_SIZE=256
@@ -130,7 +130,6 @@ CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
 CONFIG_CONSOLE_POST=y
-CONFIG_PXE_ROM_ID="10ec,8168"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
@@ -282,7 +281,6 @@ CONFIG_EC_BASE_ACPI_COMMAND=0x934
 CONFIG_EC_BASE_HOST_DATA=0x940
 CONFIG_EC_BASE_HOST_COMMAND=0x944
 CONFIG_EC_BASE_PACKET=0x950
-CONFIG_SEABIOS_PS2_TIMEOUT=0
 # CONFIG_CAVIUM_BDK is not set
 # CONFIG_MAINBOARD_HAS_CHROMEOS is not set
 # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
@@ -444,8 +442,8 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_AMD_PI is not set
 CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES=800
+CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES=1024
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES=600
+CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES=768
 # CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
 # CONFIG_DRIVERS_I2C_MAX98373 is not set
 # CONFIG_DRIVERS_I2C_MAX98927 is not set
@@ -549,9 +547,6 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_NO_POST is not set
 # CONFIG_CMOS_POST is not set
-# CONFIG_POST_DEVICE_NONE is not set
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
 CONFIG_HWBASE_DEBUG_CB=y
@@ -588,35 +583,21 @@ CONFIG_GENERATE_SMBIOS_TABLES=y
 # CONFIG_PAYLOAD_FILO is not set
 # CONFIG_PAYLOAD_GRUB2 is not set
 # CONFIG_PAYLOAD_LINUXBOOT is not set
-CONFIG_PAYLOAD_SEABIOS=y
+# CONFIG_PAYLOAD_SEABIOS is not set
 # CONFIG_PAYLOAD_UBOOT is not set
 # CONFIG_PAYLOAD_YABITS is not set
 # CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_TIANOCORE=y
-CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+CONFIG_PAYLOAD_FILE="payloads/external/tianocore/tianocore/Build/UEFIPAYLOAD.fd"
-CONFIG_SEABIOS_STABLE=y
-# CONFIG_SEABIOS_MASTER is not set
-# CONFIG_SEABIOS_REVISION is not set
-CONFIG_SEABIOS_THREAD_OPTIONROMS=y
-CONFIG_SEABIOS_VGA_COREBOOT=y
-CONFIG_SEABIOS_BOOTORDER_FILE=""
-# CONFIG_SEABIOS_ADD_SERCON_PORT_FILE is not set
-CONFIG_PAYLOAD_VGABIOS_FILE="payloads/external/SeaBIOS/seabios/out/vgabios.bin"
-CONFIG_SEABIOS_DEBUG_LEVEL=-1
-
-#
-# Using default SeaBIOS log level
-#
 CONFIG_PAYLOAD_OPTIONS=""
-CONFIG_PXE=y
+# CONFIG_PXE is not set
-
+CONFIG_TIANOCORE_STABLE=y
-#
+# CONFIG_TIANOCORE_REVISION is not set
-# PXE Options
+# CONFIG_TIANOCORE_TARGET_IA32 is not set
-#
+CONFIG_TIANOCORE_TARGET_X64=y
-CONFIG_PXE_ROM=y
+# CONFIG_TIANOCORE_DEBUG is not set
-# CONFIG_BUILD_IPXE is not set
+CONFIG_TIANOCORE_RELEASE=y
-CONFIG_PXE_ROM_FILE="system76/qemu/pxe"
+CONFIG_TIANOCORE_USE_8254_TIMER=y
-CONFIG_PXE_SERIAL_CONSOLE=y
 CONFIG_COMPRESSED_PAYLOAD_LZMA=y
 # CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
 # CONFIG_PAYLOAD_IS_FLAT_BINARY is not set