00f0267f78
or not still depends on how close the configuration options are to what they should be. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
49 lines
828 B
Plaintext
49 lines
828 B
Plaintext
config BOARD_AMD_DB800
|
|
bool "DB800"
|
|
select ARCH_X86
|
|
select CPU_AMD_LX
|
|
select NORTHBRIDGE_AMD_LX
|
|
select SOUTHBRIDGE_AMD_CS5536
|
|
select SUPERIO_WINBOND_W83627HF
|
|
select HAVE_PIRQ_TABLE
|
|
select PIRQ_ROUTE
|
|
select UDELAY_TSC
|
|
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
|
select USE_DCACHE_RAM
|
|
select USE_PRINTK_IN_CAR
|
|
|
|
config MAINBOARD_DIR
|
|
string
|
|
default amd/db800
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config MAINBOARD_PART_NUMBER
|
|
string
|
|
default "DB800"
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config HAVE_OPTION_TABLE
|
|
bool
|
|
default n
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config IRQ_SLOT_COUNT
|
|
int
|
|
default 6
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config DCACHE_RAM_BASE
|
|
hex
|
|
default 0xc8000
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config DCACHE_RAM_SIZE
|
|
hex
|
|
default 0x8000
|
|
depends on BOARD_AMD_DB800
|
|
|
|
config RAMBASE
|
|
hex
|
|
default 0x4000
|
|
depends on BOARD_AMD_DB800
|