028570b445
This allows the values to be set in a .config BUG=none TEST=Was able to set the value from a .config and built careena firmware Change-Id: I757e4b9a0b80ff42c1f49143a44f15550366fd0b Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37879 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
107 lines
4.6 KiB
Plaintext
107 lines
4.6 KiB
Plaintext
#
|
|
# Copyright (c) 2013 - 2014, Sage Electronic Engineering, LLC
|
|
# Copyright (C) 2016 Advanced Micro Devices, Inc.
|
|
# All rights reserved.
|
|
#
|
|
# Redistribution and use in source and binary forms, with or without
|
|
# modification, are permitted provided that the following conditions are met:
|
|
# * Redistributions of source code must retain the above copyright
|
|
# notice, this list of conditions and the following disclaimer.
|
|
# * Redistributions in binary form must reproduce the above copyright
|
|
# notice, this list of conditions and the following disclaimer in the
|
|
# documentation and/or other materials provided with the distribution.
|
|
# * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
|
# its contributors may be used to endorse or promote products derived
|
|
# from this software without specific prior written permission.
|
|
#
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
|
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
|
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
|
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
|
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
|
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
|
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
|
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
#
|
|
|
|
if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01 || SOC_AMD_STONEYRIDGE
|
|
|
|
config AGESA_BINARY_PI_VENDORCODE_PATH
|
|
string "AGESA PI directory path"
|
|
default "src/vendorcode/amd/pi/00630F01" if CPU_AMD_PI_00630F01
|
|
default "src/vendorcode/amd/pi/00730F01" if CPU_AMD_PI_00730F01
|
|
default "src/vendorcode/amd/pi/00670F00" if AMD_APU_MERLINFALCON
|
|
default "src/vendorcode/amd/pi/00670F00" if AMD_APU_STONEYRIDGE || AMD_APU_PRAIRIEFALCON
|
|
default "src/vendorcode/amd/pi/00660F01" if CPU_AMD_PI_00660F01
|
|
help
|
|
Specify where to find the AGESA header files
|
|
for AMD platform initialization.
|
|
|
|
config AGESA_BINARY_PI_FILE
|
|
string "AGESA PI binary file name"
|
|
default "3rdparty/blobs/pi/amd/00630F01/FP3/AGESA.bin" if CPU_AMD_PI_00630F01
|
|
default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01
|
|
default "3rdparty/amd_blobs/stoneyridge/pi/CZ/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if AMD_APU_MERLINFALCON && USE_AMD_BLOBS
|
|
default "3rdparty/amd_blobs/stoneyridge/pi/ST/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if AMD_APU_PRAIRIEFALCON && USE_AMD_BLOBS
|
|
default "3rdparty/amd_blobs/stoneyridge/pi/ST/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if AMD_APU_STONEYRIDGE && USE_AMD_BLOBS
|
|
default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01
|
|
help
|
|
Specify the binary file to use for AMD platform initialization.
|
|
|
|
config AGESA_BINARY_PI_AS_STAGE
|
|
bool "AGESA Binary PI is added as stage to CBFS."
|
|
depends on SOC_AMD_STONEYRIDGE
|
|
help
|
|
AGESA will be added as a stage utilizing --xip cbfstool options
|
|
as needed relocating the image to the proper location in memory-mapped
|
|
cpu address space. It's required that the file be in ELF format
|
|
containing the relocations necessary for relocating at runtime.
|
|
|
|
config AGESA_SPLIT_MEMORY_FILES
|
|
bool "Split AGESA Binary PI into pre- and post-memory files."
|
|
depends on AGESA_BINARY_PI_AS_STAGE
|
|
default n
|
|
help
|
|
Specifies that AGESA is split into two binaries for pre- and
|
|
post-memory.
|
|
|
|
config AGESA_PRE_MEMORY_BINARY_PI_FILE
|
|
string "Pre memory Binary PI file name"
|
|
depends on AGESA_SPLIT_MEMORY_FILES
|
|
default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_premem.elf" if SOC_AMD_STONEYRIDGE && USE_AMD_BLOBS
|
|
help
|
|
Specify the binary file to use for pre-memory AMD platform
|
|
initialization.
|
|
|
|
config AGESA_POST_MEMORY_BINARY_PI_FILE
|
|
string "Post memory Binary PI file name"
|
|
depends on AGESA_SPLIT_MEMORY_FILES
|
|
default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_postmem.elf" if SOC_AMD_STONEYRIDGE && USE_AMD_BLOBS
|
|
help
|
|
Specify the binary file to use for post-memory AMD platform
|
|
initialization.
|
|
|
|
config AGESA_CBFS_NAME
|
|
string
|
|
default "AGESA"
|
|
|
|
config AGESA_PRE_MEMORY_CBFS_NAME
|
|
string
|
|
default "AGESA_PRE_MEM"
|
|
|
|
config AGESA_POST_MEMORY_CBFS_NAME
|
|
string
|
|
default "AGESA_POST_MEM"
|
|
|
|
config AGESA_BINARY_PI_LOCATION
|
|
hex "AGESA PI binary address in ROM"
|
|
default 0xFFE00000
|
|
depends on !AGESA_BINARY_PI_AS_STAGE
|
|
help
|
|
Specify the ROM address at which to store the binary Platform
|
|
Initialization code.
|
|
|
|
endif
|