035cf71822
I updated my spike patch[1] to cleanly apply to current spike master. As a side effect, the UART is now at 0x02100000. [1]: https://github.com/riscv/riscv-isa-sim/pull/53 Change-Id: I4cb09014619e230011486fa57636abe183baa4be Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/20126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
25 lines
717 B
C
25 lines
717 B
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <console/uart.h>
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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uintptr_t uart_platform_base(int idx)
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{
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return (uintptr_t) 0x02100000;
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}
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