This board is the only user of these ancient chipsets, so we'll do all in one go. Also wipe out some extra headers. Change-Id: I22c172d577e6072562d8fcfa58145ec62473823e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
35 lines
940 B
Plaintext
35 lines
940 B
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008-2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SOUTHBRIDGE_INTEL_I82801DX
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bool
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select IOAPIC
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG
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select SOUTHBRIDGE_INTEL_COMMON
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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if SOUTHBRIDGE_INTEL_I82801DX
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config EHCI_BAR
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hex
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default 0xfef00000
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endif
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