03e002f64d
TEST=emerge-{oak, kukui, asurada, cherry} coreboot;
verified on Asurada and Cherry P0
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Ic6a87e7d5983bf14ad123de82ed670a22a7be1aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52541
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
36 lines
982 B
Makefile
36 lines
982 B
Makefile
ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
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bootblock-y += bootblock.c
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bootblock-y += ../common/mmu_operations.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-y += ../common/timer.c timer.c
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bootblock-y += ../common/uart.c
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bootblock-y += ../common/wdt.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-y += ../common/timer.c timer.c
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verstage-y += ../common/uart.c
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verstage-y += ../common/wdt.c
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romstage-y += ../common/cbmem.c
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romstage-y += emi.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += ../common/timer.c timer.c
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romstage-y += ../common/uart.c
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romstage-y += ../common/wdt.c
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ramstage-y += emi.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-y += soc.c
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ramstage-y += ../common/timer.c timer.c
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ramstage-y += ../common/uart.c
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ramstage-y += ../common/wdt.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
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endif
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