system76-coreboot

Files

Jonathan Neuschäfer 042a8336f3 arch/riscv: Pass the bootrom-provided FDT to the payload

The RISC-V boot protocol foresees that at every stage boundary (bootrom
to boot loader, boot loader -> OS), register a0 contains the Hart ID and
a1 contains the physical address of the Flattened Device Tree that the
stage shall use.

As a first step, pass the bootrom-provided FDT to the payload,
unmodified.

Change-Id: I468bc64a47153d564087235f1c7e2d10e3d7a658
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2018-02-20 20:46:12 +00:00

arm

Constify struct cpu_device_id instances

2017-11-23 05:00:17 +00:00

arm64

arm64: Add read64() and write64()

2018-02-12 23:05:08 +00:00

mips

Constify struct cpu_device_id instances

2017-11-23 05:00:17 +00:00

power8

Constify struct cpu_device_id instances