f70bd99d2a
unused includes of <stdin.h> found using following commande: diff <(git grep -l '#include <stdint.h>' -- src/) <(git grep -l 'int8_t\|uint8_t\|int16_t\|uint16_t\|int32_t\|uint32_t\|int64_t\| uint64_t\|intptr_t\|uintptr_t\|intmax_t\|uintmax_t\|s8\|u8\|s16\| u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|UINT8_MAX\|INT16_MIN\ |INT16_MAX\|UINT16_MAX\|INT32_MIN\|INT32_MAX\|UINT32_MAX\|INT64_MIN\ |INT64_MAX\|UINT64_MAX\|INTMAX_MIN\|INTMAX_MAX\|UINTMAX_MAX' -- src/) |grep '<' |grep -v vendor |grep -vF '.h' Change-Id: Icb9b54c6abfb18d1e263665981968a4d7cccabeb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41148 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/cpu.h>
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#include <cpu/x86/msr.h>
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#include "haswell.h"
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/* MSR Documentation based on
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* "Sandy Bridge Processor Family BIOS Writer's Guide (BWG)"
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* Document Number 504790
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* Revision 1.6.0, June 2012 */
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void intel_cpu_haswell_finalize_smm(void)
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{
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#if 0
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/* Lock C-State MSR */
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msr_set_bit(MSR_PKG_CST_CONFIG_CONTROL, 15);
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/* Lock AES-NI only if supported */
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if (cpuid_ecx(1) & (1 << 25))
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msr_set_bit(MSR_FEATURE_CONFIG, 0);
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#ifdef LOCK_POWER_CONTROL_REGISTERS
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/*
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* Lock the power control registers.
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*
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* These registers can be left unlocked if modifying power
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* limits from the OS is desirable. Modifying power limits
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* from the OS can be especially useful for experimentation
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* during early phases of system bringup while the thermal
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* power envelope is being proven.
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*/
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msr_set_bit(MSR_PP0_CURRENT_CONFIG, 31);
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msr_set_bit(MSR_PP1_CURRENT_CONFIG, 31);
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msr_set_bit(MSR_PKG_POWER_LIMIT, 63);
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msr_set_bit(MSR_PP0_POWER_LIMIT, 31);
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msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
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#endif
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/* Lock TM interrupts - route thermal events to all processors */
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msr_set_bit(MSR_MISC_PWR_MGMT, 22);
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/* Lock memory configuration to protect SMM */
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msr_set_bit(MSR_LT_LOCK_MEMORY, 0);
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#endif
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}
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